RTD–CMOS Pipelined Networks for Reduced Power Consumption

Abstract

The incorporation of Resonant Tunnel Diodes (RTDs) into III/V transistor technologies has shown an improved circuit performance, producing higher circuit speed, reduced component count, and/or lower power consumption. Currently, the incorporation of these devices into CMOS technologies (RTD-CMOS) is an area of active research. Although some studies have concentrated on evaluating the advantages of this incorporation, more work in this direction is required. In this paper, we compare RTD-CMOS and pure CMOS realizations of a logic gate network which can be operated in a gate-level pipeline. Significantly lower average power is obtained for RTD-CMOS implementations.

Experimental Validation of a Two-Phase Clock Scheme for Fine-Grained Pipelined Circuits Based on Monostable to Bistable Logic Elements

“…Many circuits have been reported which use NDR for different applications (memories, logic, oscillators, A/D converters) and with different goals (high speed, low power or low device count,...) [8], [9] and the MOBILE principle has been identified as a key element in crossbar architectures [10]. In particular, MOBILE RTD-CMOS pipelined architectures have been compared to conventional CMOS fine-grained pipelines [11] and shown to be significatively more power efficient than conventional CMOS. Also, different transistor circuits have been explored that emulate the NDR characteristic [12], [13], [14], [15], [16].…”

Two-Phase RTD-CMOS Pipelined Circuits

“…Currently, the realization of tunnel diodes in silicon is a very active research area where progresses are expected. In fact, it has been suggested that the addition of RTDs to CMOS technology (RTD-CMOS) could extend its life and several works have reported advantages of incorporating RTDs to CMOS [3]- [5].…”

“…2(a) depicts chained MO-BILE elements implemented with the single-phase architecture. Single-phase RTD-CMOS pipelined architectures have been compared to conventional CMOS fine-grained pipelines [5] and shown to be significantly more power efficient with power ratios over 2 in most of the reported comparison experiments. However, they exhibit poor design robustness.…”