1997
DOI: 10.1109/22.641785
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Rigorous and simplified models for the capacitance of a circularly symmetric via

Abstract: An integral-equation method is presented for analyzing the capacitance of circularly symmetric vias with thick conductors and conical posts. From the numerical data, simple expressions are derived which account for the effect of conductor thickness and cone angle. Use of the approximate expressions allows one to accurately determine via capacitance while using a simpler thin-conductor straight-post via model.

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Cited by 22 publications
(5 citation statements)
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“…At the same time, the parasitic capacitance and inductance introduced by via parasitic effect will also lead to reflection and scattering in the process of signal transmission, which will affect the performance of the link. Therefore, the research on the characteristics of vertical interconnected vias is not only of great significance to the simulation and design of multilayer circuit board, but also can better guide the analysis of signal integrity in high-speed digital circuits [25][26][27][28].…”
Section: Research On Via For 25 Gbps Rate Backplanementioning
confidence: 99%
“…At the same time, the parasitic capacitance and inductance introduced by via parasitic effect will also lead to reflection and scattering in the process of signal transmission, which will affect the performance of the link. Therefore, the research on the characteristics of vertical interconnected vias is not only of great significance to the simulation and design of multilayer circuit board, but also can better guide the analysis of signal integrity in high-speed digital circuits [25][26][27][28].…”
Section: Research On Via For 25 Gbps Rate Backplanementioning
confidence: 99%
“…HD-PCB structures consist of several metal layers separated by dielectric substrates. The vias and microvias used in multilayer PCBs allow connecting lines of different metallic levels together or connecting devices to the power and ground plane [5]. The different metal planes can also be connected together with metallic plated through holes (PTHs).…”
Section: Introductionmentioning
confidence: 99%
“…To study the via discontinuity, a host of methods have been developed [1][2][3][4][5][6][7][8][9][10]. Most of them treat the via as two types: the via through one PEC ground planes [3][4][5][6][7] and the via through the two PEC ground/power planes [8 -10]. For the via through one single PEC plane, the quasi-static approach is used to extract the lumped capacitance and inductance [3][4][5][6].…”
Section: Introductionmentioning
confidence: 99%
“…Most of them treat the via as two types: the via through one PEC ground planes [3][4][5][6][7] and the via through the two PEC ground/power planes [8 -10]. For the via through one single PEC plane, the quasi-static approach is used to extract the lumped capacitance and inductance [3][4][5][6]. At high frequency, the full-wave solution is also developed [7] and compared with the quasistatic solution.…”
Section: Introductionmentioning
confidence: 99%
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