2007
DOI: 10.1109/ted.2007.896391
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Revolutional Progress of Silicon Technologies Exhibiting Very High Speed Performance Over a 50-GHz Clock Rate

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Cited by 58 publications
(48 citation statements)
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“…Therefore, high-k materials should be introduced instead of conventional SiO 2 gate insulator. Many institutions have reported so far the Si surface flattening process [17,18,19,20], and MOSFETs with atomically flat interface at Si/gate insulator show higher performances than those with conventional devices [21,22,23,24]. The 1/f noise in MOSFETs with Si/high-k gate stacks has also been reported [25,26].…”
Section: Introductionmentioning
confidence: 96%
“…Therefore, high-k materials should be introduced instead of conventional SiO 2 gate insulator. Many institutions have reported so far the Si surface flattening process [17,18,19,20], and MOSFETs with atomically flat interface at Si/gate insulator show higher performances than those with conventional devices [21,22,23,24]. The 1/f noise in MOSFETs with Si/high-k gate stacks has also been reported [25,26].…”
Section: Introductionmentioning
confidence: 96%
“…Also, some papers report on the impact of the flatness of the interface on 1/f noise characteristics [3,4]. Then, a recent work has proposed that the MOS inversion layer mobility and current drivability of MOSFETs can be improved by the introduction of atomically flat gate insulator/silicon interface up to very high speed performance [5]. Also, electrical characteristics variation and 1/f noise of MOSFETs that increase with a progress of the device miniaturization have become one of the most crucial issues in the analog and even digital applications for the recent extremely scaled down LSIs.…”
Section: Introductionmentioning
confidence: 99%
“…As the device scaling, the atomic scale roughness of the SiO 2 /Si and gate electrode/SiO 2 interfaces will significantly affect the device performance [1,2,3,4]. It has been reported that the atomically flat surface of Si(100) is able to be obtained by annealing in Ar or H 2 ambient at 1200ºC [5,6,7].…”
Section: Introductionmentioning
confidence: 99%
“…It has been reported that the atomically flat surface of Si(100) is able to be obtained by annealing in Ar or H 2 ambient at 1200ºC [5,6,7]. Recently many institutions have reported that MOSFETs with atomically flat interface between Si(100) and gate insulator show higher performances than those with conventional devices [8,9,10]. It has been known that the carrier mobility improved by flattening the interface between Si and gate insulator, because the carrier scattering caused by the interface roughness is suppressed [10,11].…”
Section: Introductionmentioning
confidence: 99%