DTCO and Computational Patterning 2022
DOI: 10.1117/12.2614460
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Retargeting-aware design for manufacturability (DFM) checks using machine learning

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Cited by 1 publication
(2 citation statements)
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“…Design-formanufacturability (DFM) checks are part of IC physical verification and can be defined as conservative rules checks beyond DRC that provide additional fabrication process margin to IC designers. Wang et al 9 incorporated 17 localized geometrical features for metal-via LE patterns with multi-layer perceptron (MLP) neural network (NN) architecture to check for metal-via enclosure DFM violations. The aim of this model is to aid the IC design process and fix potential DFM violations before manufacturing.…”
Section: Applications For Ic Layouts During Ic Design-phasementioning
confidence: 99%
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“…Design-formanufacturability (DFM) checks are part of IC physical verification and can be defined as conservative rules checks beyond DRC that provide additional fabrication process margin to IC designers. Wang et al 9 incorporated 17 localized geometrical features for metal-via LE patterns with multi-layer perceptron (MLP) neural network (NN) architecture to check for metal-via enclosure DFM violations. The aim of this model is to aid the IC design process and fix potential DFM violations before manufacturing.…”
Section: Applications For Ic Layouts During Ic Design-phasementioning
confidence: 99%
“…Although Ref. 9 presented a mixture of density features and localized extracted geometrical features to represent layout patterns, the list of extracted features still ignores several descriptive details about the contextual patterns, such as corners and internal and external spacings. To address this problem, we present a novel edge-based approach named geometrical positioning surveying (GPS) 30 to represent the layout POIs and their surrounding context of patterns.…”
Section: Introductionmentioning
confidence: 99%