Rerouting: Scalable NoC self-optimization by distributed hardware-based connection reallocation

Heisswolf, Jan; Singh, Maximilian; Kupper, Martin; König, Ralf; Becker, J.

doi:10.1109/reconfig.2013.6732328

Cited by 6 publications

(3 citation statements)

References 26 publications

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“…Instead of retarding packets if routers are power-gated, it would also be possible to use a different routing scheme than XY routing. For example Heisswolf et al [22] describe a rerouting mechanism. But the more complex routing algo-rithms come with a resource overhead and increased latency if non minimal routes are used.…”

Section: B Simulation Infrastructurementioning

confidence: 99%

Network on Chip Router with Power Management Unit for Improved Network Fabric Power Efficiency

2017

IJRTER

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Abstract-Growing chip integration density and increasing frequencies lead to tremendous leakage power and henceforth to chip heat problems. Power management is one possibility to reduce the power consumption and get the temperature problem under control. Current technology mainly focuses on power-gating techniques on basis of multi-core systems but leaving the network perspective out of scope. We provide a holistic concept, bringing together voltage and frequency scaling techniques for network-on-chips. Following this, network static power consumption could be minimized without affecting the system performance. We present a light-weight power management controller for network-on-chips with online monitoring to optimize the power consumption of network resources. Our work comprises a hardware simulation model for design space exploration of varying technology specific parameters and an FPGA based prototype for verification. The power saving poten-tial heavily depend on the network communication load.

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Section: B Simulation Infrastructurementioning

confidence: 99%

Network on Chip Router with Power Management Unit for Improved Network Fabric Power Efficiency

2017

IJRTER

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“…Other adaptive NoC-based communication architectures are proposed in [6] and [7]. Both NoCs have a mesh topology and provides Best Effort (BE) or guaranteed service (GS).…”

Section: Related Workmentioning

confidence: 99%

“…They have a much higher demand of hardware resources which makes the implementation more difficult on an FPGA. In addition, [6] does not support partial reconfiguration of the routers.…”

Section: Related Workmentioning

confidence: 99%

RAR-NoC: A reconfigurable and adaptive routable Network-on-Chip for FPGA-based multiprocessor systems

Rettkowski

Göhringer

2014

2014 International Conference on ReConFigurable Computing and FPGAs (ReConFig14)

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This paper presents a reconfigurable and adaptive routable Network-on-Chip (NoC) called RAR-NoC, which can be adapted at runtime to the application requirements. Therefore, RAR-NoC supports runtime reconfiguration of the routers as well as dynamic selection of the routing algorithm (XY or WestFirst) for each message. To evaluate the benefits of this flexible architecture, a heterogeneous reconfigurable multiprocessor system consisting of the ARM dual-core processor and several MicroBlaze processors has been developed and implemented on a Xilinx Zynq device. Network interfaces have been designed to efficiently connect the different processors to RAR-NoC. To analyze the data throughput and the channel utilization of the NoC at runtime, a centralized monitor core was developed and integrated. The required resources have been measured and it can be seen, that the area overhead for supporting both routing algorithms is less than 11%. Finally, it has been shown that RARNoC can avoid hotspots and therefore provides a higher throughput.

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Survey on Real-Time Network-on-Chip Architectures

Hesham

Rettkowski

Göhringer

et al. 2015

Lecture Notes in Computer Science

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Rerouting: Scalable NoC self-optimization by distributed hardware-based connection reallocation

Cited by 6 publications

References 26 publications

Network on Chip Router with Power Management Unit for Improved Network Fabric Power Efficiency

Network on Chip Router with Power Management Unit for Improved Network Fabric Power Efficiency

RAR-NoC: A reconfigurable and adaptive routable Network-on-Chip for FPGA-based multiprocessor systems

Survey on Real-Time Network-on-Chip Architectures

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