Reliable mapping and partitioning of performance-constrained openCL applications on CPU-GPU MPSoCs

Abstract

Heterogeneous Multi-Processor Systems-on-Chips (MPSoCs) containing CPU and GPU cores are typically required to execute applications concurrently. Existing approaches exploit applications executing in CPU and GPU cores at the same time taking into account performance and energy consumption for mapping and partitioning. This paper presents a proposal for mapping and partitioning of applications in CPU-GPU MPSoCs taking into account the temperature behavior of the system. We evaluate the temperature profiling to partition the applications between CPU and GPU. The profiling is done by measuring the temperature of the CPU and GPU cores while executing different applications at different partitions. Results shown up to 13% savings of average temperature of the chip while maintaining performance requirements. A lower thermal behavior represents a better long-term reliability (lifetime) of the SoC.

A Runtime Resource Management Policy for OpenCL Workloads on Heterogeneous Multicores

“…The proposed policy has been implemented and evaluated with the experimental setup discussed in Section III. We compared the approach against a static strategy mimicking the approaches proposed in [9], [10], the most recent related work addressing our considered scenario. The strategy assumes that all applications are known and can be profiled at designtime; it performs a design-time exploration to identify a set of optimal configuration points for each application achieving the required throughput by means of different number of cores and frequency levels (for the sake of fairness kernel partitioning is not considered).…”

“…Such information is used at runtime to optimize overall power consumption while executing a workload composed of an unknown mix of such applications. Later the approach has been enhanced also to consider temperature [10].…”

SoCodeCNN: Program Source Code for Visual CNN Classification Using Computer Vision Methodology

“…In another study by Cummins et al [2], the authors utilize similar feature extraction methodology from source code to be fed to a DNN model to make decisions and this approach also requires the intervention of a skilled person to perform the manual feature extraction. On the other hand, studies [28], [46], [47] which include hybrid scheduling/resource mapping where the methodology is partly dependent on offline and online training of the executing application to decide the appropriate processing elements and their operating frequencies, also has its own limitations. In case a new application is being executed on the device, we need to perform an offline training on this new application in order to achieve an improvement on the main objective of scheduling/resource mapping to optimize performance, energy efficiency, etc.…”

Task Scheduling Frameworks for Heterogeneous Computing Toward Exascale

“…System-on-chip (MPSoC) Nowadays, MPSOC is considered a hot topic, where there have been many pieces of research introducing different approaches. [54,55,56,57,58,59,60,61]. The work mostly considered Samsung Exynos 5422 SoC which utilizes 4 big and/or 4 little cores that possess the same instruction set architecture ISAs [55,57,60].…”

“…In [54] they divide the workload on CPU/GPU savings of the average temperature of the chip while keeping performance needs. A lower thermal behavior exhibits an enhanced long-term reliability (lifetime) of the SoC.…”