Reliability Analysis for Integrated Circuit Amplifiers Used in Neural Measurement Systems

2015 IEEE International Reliability Physics Symposium

Paul

et al. 2015

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For safety-critical applications with long operational lifetimes the analysis of aging aspects caused by NBTI and HCD is moving into the focus of the designer. The increasing complexity of modern analog and mixed-signal circuits makes a reliability analysis on transistor level for complex systems quite challenging. In this paper we present a method using BoxBehnken Designs and Response Surface Modeling with exponential function interpolation. This approach enables accelerated reliability analysis on system level. A tool is introduced to support the behavioral model generation process. The derived model includes information on degradation and process variations. The method is demonstrated for a current-mirror and a CS amplifier to quantify the degradation influence. The accuracy of the behavioral models and the age-dependent yield of the circuits is determined.

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Section: A Current-mirrormentioning

confidence: 99%

NBTI and HCD aware behavioral models for reliability analysis of analog CMOS circuits

2015 IEEE International Reliability Physics Symposium

Paul

et al. 2015

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“…This method pushes the concern of degradation to the end of the designflow. An improvement in lifetime has also been shown in [3]. By investigating simple biasing and current-mirror circuits and their aging sensitivity, a topology-driven design method was proposed that can significantly reduce the degradation of system performances.…”

Section: Introductionmentioning

confidence: 97%

“…Towards reliable circuit design new methods must be found in order to design-in reliability at design time. Degradation-aware design has already been addressed in several studies, [2], [3], [4], In [2] a circuit optimizer is used in combination with RelXpert to optimize different designs for a long lifetime. This is achieved by minimizing the worst case distance for given performances.…”

Section: Introductionmentioning

confidence: 99%

Using operating point-dependent degradation and g<inf>m</inf>/I<inf>D</inf> method for aging-aware design

2013 IEEE International Integrated Reliability Workshop Final Report

Peters-Drolshagen

et al. 2013

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Effects like NBTI and HCI are degrading the characteristics of analog circuits. Available countermeasures to maintain system performances often include the use of optimizers or other external tools to size devices appropriately, which give no insight in relations between degradation and circuit parameters for the designer. This paper proposes an extension of the g m/ID sizing method by considering aged transistor parameters for fresh circuit design. A possible usage scenario for this investigation is given by optimizing a simple circuit towards higher reliability. The degradation in amplification of a common source amplifier is reduced by 19 % for a full time operation of 10 years.

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Analog behavioral modeling for age-dependent degradation of complex analog circuits

2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES)

Taddiken

et al. 2014