Reliability Analysis and Comparison of Implication and Reprogrammable Logic Gates in Magnetic Tunnel Junction Logic Circuits

Mahmoudi, Hiwa; Windbacher, Thomas; Sverdlov, Viktor; Selberherr, S.

doi:10.1109/tmag.2013.2278683

Cited by 25 publications

(12 citation statements)

References 37 publications

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“…The resistance modulation between the high and low resistance states in the MTJ is proportional to the TMR ratio of the MTJs. Therefore, from a device point of view, the average error probabilities of all MTJ-based operations are expected to decrease with increasing TMR ratio which is considered as the most important device parameter for the reliability [176].…”

Section: Materials Implication Based Logic-in-memorymentioning

confidence: 99%

Silicon spintronics: Progress and challenges

Sverdlov

Selberherr

2015

Physics Reports

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Section: Materials Implication Based Logic-in-memorymentioning

confidence: 99%

Silicon spintronics: Progress and challenges

Sverdlov

Selberherr

2015

Physics Reports

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“…The error probability of MTJ-based operations decrease with increasing TMR ratio which is thus the most important device parameter for the reliability (41). …”

Section: Stt-mram-based Logic-in-memory Architecturesmentioning

confidence: 99%

(Invited) Spin-Based Silicon and CMOS-Compatible Devices

Sverdlov

Selberherr

2015

ECS Trans.

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Silicon, the main material of microelectronics, is attractive for extending the functionality of MOSFETs by using the electron spin. However, spin lifetime decay in the silicon-on-insulator transistor channel is a potential threat to spin-driven devices using silicon. We predict a giant enhancement of the electron spin lifetime in silicon thin films by applying uniaxial mechanical stress. The advantage of this proposal is that stress techniques are already routinely used in semiconductor industry to enhance the electron and hole mobility, respectively. The spin manipulation in silicon by purely electrical means is a challenge because of a relatively weak coupling of the electron spin to the electric field through an effective gate voltage dependent spin-orbit interaction. In contrast, the coupling between the spin orientation and charge current is much stronger in magnetic tunnel junctions. Magnetic random access memory (MRAM) built on magnetic tunnel junctions is CMOS-compatible and possesses all properties required for universal memory. We demonstrate a significant improvement of one of the critical MRAM characteristics, the switching time, by specially designing the recording layer. Finally, by using MRAM arrays we discuss a realization of an intrinsic non-volatile logic-inmemory architecture suitable for future low-power electronics.

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“…21 The effects of MTJ have been extensively studied by a number of different groups. [22][23][24][25][26] Recently, there has been a study, by Tanaka et al, into the possibility of using microwaves to selectively switch the magnetization in a three-layered stacked magnetic structure. 27 Through micromagnetic simulations, they were able to show that it is possible to individually switch the polarization of each layer.…”

Section: Conceptmentioning

confidence: 99%

Reconfigurable and non-volatile vertical magnetic logic gates

Butler

Shachar

Lee

et al. 2014

Journal of Applied Physics

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In this paper, we discuss the concept and prototype fabrication of reconfigurable and non-volatile vertical magnetic logic gates. These gates consist of two input layers and a RESET layer. The RESET layer allows the structure to be used as either an AND or an OR gate, depending on its magnetization state. To prove this concept, the gates were fabricated using a multi-layered patterned magnetic media, in which three magnetic layers are stacked and exchange-decoupled via non-magnetic interlayers. We demonstrate the functionality of these logic gates by conducting atomic force microscopy and magnetic force microscopy (MFM) analysis of the multi-layered patterned magnetic media. The logic gates operation mechanism and fabrication feasibility are both validated by the MFM imaging results. V

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Reliability Analysis and Comparison of Implication and Reprogrammable Logic Gates in Magnetic Tunnel Junction Logic Circuits

Cited by 25 publications

References 37 publications

Silicon spintronics: Progress and challenges

Silicon spintronics: Progress and challenges

(Invited) Spin-Based Silicon and CMOS-Compatible Devices

Reconfigurable and non-volatile vertical magnetic logic gates

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