Reducing power dissipation after technology mapping by structural transformations

Logic transformation for low power synthesis

“…Traditionally, logic transformation in a logic circuit is carried out by identifying signals with high switching activities and re-synthesizing the signals one at a time [2,7,9]. Such a sequential, greedy approach is very fast.…”

“…Logic transformation techniques based on the logic perturbation method [1] are used to re-synthesize a combinational circuit [9]. In [7], a structural transformation technique is proposed based on compatible sets of permissible functions (CSPF) [5]. Recently, in [2], more comprehensive permissible functions, referred to as set of pairs of functions to be distinguished (SPFD) [10], are introduced to obtain better FPGA implementations with lower power dissipation.…”

Symbolic computation of logic implications for technology-dependent low-power synthesis

“…If we compare our results to those reported in [10] we see that we m a y not always be able to obtain as high a percentage of power savings. This is due in part to the fact that they are exploiting 2-variable implications (e.g., x = 1 y z = 0 ) and also because they are including observability conditions when generating their implications.…”

“…In addition, he may permit gate transformations that actually increase the power and/or delay. Finally, the main dierence between our work and that proposed in [10] consists of the way logic implications, or valid clauses, are found. Their approach uses an analysis tool to identify permissible transformations on the network which m a y reduce power dissipation.…”

“…Such implications are used to identify network transformations which add and remove connections in the circuit, with the objective of eliminating the high power nodes or connections from them. Although other redundancy addition and removal techniques have been proposed (e.g., [5,8,10]), our method is innovative i n t w o main aspects; rst, it uses a p o w erful learning procedure based on symbolic calculations which allows the identication of very general forms of logic implications; second, it operates at the technology dependent level; this allows more accurate power estimates to drive the overall re-synthesis process. Experimental results, obtained on a sample of Mcnc'91 benchmarks [9], show the viability and the eectiveness of the proposed approach.…”