Reduced pressure chemical vapour deposition of SiGe virtual substrates for high mobility devices

Abstract

We have studied the strain state, film and surface morphology of SiGe virtual substrates grown by reduced pressure chemical vapour deposition (RP-CVD). The macroscopic strain relaxation and the Ge composition of those virtual substrates have been estimated in high resolution x-ray diffraction, using Omega-2Theta scans around the (004) and (224) orders. Typically, linearly graded Si 0.7 Ge 0.3 virtual substrates 5 µm thick are 96% relaxed. From transmission electron microscopy, we confirm that the misfit dislocations generated to relax the lattice mismatch between Si and SiGe are mostly confined inside the graded layer. The threading dislocations density obtained for Ge concentrations of 20% and 27% is indeed typically of the order of (7.5 ± 2.5) ×10 5 cm −2 . The surface roughness of the relaxed SiGe virtual substrates increases significantly as the Ge concentration approaches 30%. We find for the technologically important Ge concentration of 30% a surface root mean square roughness of 5 nm, with an undulation wavelength for the cross-hatch of the order of 1 µm. We have also studied the electronic quality of our RP-CVD grown SiGe virtual substrates. We have grown a MODFET-like heterostructure for this purpose, with a buried tensile-strained Si channel 8 nm thick embedded inside SiGe 31%. We have obtained a well-behaved two-dimensional electron gas in the Si channel, with electron sheet densities and mobilities at 1.45 K of 5.7 × 10 11 cm −2 and 180 000 cm 2 V −1 s −1 , respectively.

Reduced pressure-chemical vapor deposition of intrinsic and doped Ge layers on Si(001) for microelectronics and optoelectronics purposes

“…For such thick Ge layers, the surface presents a regular morphology which is some sort of convolution in-between mounds and a cross-hatch pattern, i.e. undulations along the /1 1 0S directions, as in SiGe virtual substrates [30,31]. The surface roughness is, however, rather low, especially when taking into account the very large lattice mismatch which has been accommodated (4.2% in-between Si and Ge).…”

High germanium content SiGe virtual substrates grown at high temperatures

“…SiGe virtual substrates can be obtained through different means, the most mature up to now being the graded buffer approach. It consists in a thick, nearly fully relaxed SiGe layer (which has a larger lattice parameter than Si) deposited on top of a graded Ge concentration buffer layer, itself on top of a silicon substrate [2]. Recently, another means has been proposed to add some stress in the silicon channel of very short gate length MOSFETs through some process-induced uni-axial strain [3].…”

SiGe high-temperature growth kinetics in reduced pressure-chemical vapor deposition

“…Both are detrimental to the device performances of Si/SiGe heterostructures, since they lead in 2D electron or hole gas to lower drift mobilities and cause difficulties in device processing. Growing a linearly or step graded Si 1Àw Ge w graded layer followed by a thick constant composition Si 1Àx-Ge x (0pwpx) buffer layer (the resulting structure is called a ''virtual substrate'') ensures that the lattice mismatch is relaxed gradually, leading to a bending of the misfit dislocations inside the graded layer and thus to a reduction of the threading dislocation density in the nearly fully relaxed constant composition layer on top [6].…”