Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications

Kim, Jin Woo; Chu, Michael; Philip, J.; Zia, Aamir; Kraft, R.P.; McDonald, J. F.

doi:10.1049/iet-cds.2009.0178

Cited by 5 publications

(4 citation statements)

References 16 publications

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“…It has more than 90% probability of success once N is larger than 200, i.e. for densely and moderately populated crossbars (as commonly found in practice [20]- [22]). When the sparsity is very near to 100%, the one-to-one onto relationship on which the proposed approach relies, may not exist in such crossbars.…”

Section: Simulation Resultsmentioning

confidence: 88%

Testing a Nanocrossbar for Multiple Fault Detection

Lombardi

Almurib

et al. 2013

IEEE Trans. Nanotechnology

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This paper proposes an approach for testing a nanocrossbar switch; fault detection is considered in the presence of faulty switches and nets (of a permanent nature only) in the crossbar. To ensure detection, a one-to-one (onto) relationship in the setting (programming) of the switches is established in each of the configurations of the crossbar. This is accomplished using a constant-sum transformation of the characteristic matrix of the crossbar by utilizing different graph algorithms in O(N 4 .5 ) where N is the matrix dimension. Matrix properties are related to graph algorithms to generate permutation matrices as corresponding to the configurations (phases) of the crossbar. The conditions by which multiple faults are detected by the modified counting sequence (as test set), are proved. Simulation results are provided to further substantiate the validity of the proposed approach to test nanocrossbars of very large dimension and with different switch distribution.

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Section: Simulation Resultsmentioning

confidence: 88%

Testing a Nanocrossbar for Multiple Fault Detection

Lombardi

Almurib

et al. 2013

IEEE Trans. Nanotechnology

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“…A wideband SiGe crossbar switch could be used to reconfigure digital or analog cross connections in a variety of systems. We present here a crossbar switch design implemented in 8HP that is nonblocking and capable of 80-Gb/s transmission with a reconfiguration time of 160 ps [35]. With an 8 Â 8 crosspoint configuration, the switch is capable of routing a possible eight inputs to eight outputs.…”

Section: E Bicmos Crossbar Switchmentioning

confidence: 99%

“…Output of crossbar switch test circuit corresponding to several selected outputs of the phased array system[35].…”

mentioning

confidence: 99%

High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology

et al. 2015

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| In this paper, we discuss the advantages and opportunities presented by high-speed (> 50 GHz) reconfigurable integrated circuits and how they may drive reconfigurable systems applications, such as software-defined radio, radar, and imaging. We propose silicon-germanium (SiGe) BiCMOS as an example technology that enables ultrafast reconfigurable systems and present several circuit designs based on SiGe heterojunction bipolar transistors (HBTs). We compare circuit designs between generations of IBM's SiGe process, including a recent 9HP process featuring devices with a cutoff frequency ðf T Þ of 300 GHz. We describe an architecture for an 8-b 80-Gs/s analog-to-digital converter (ADC) and a 48 Â 48 cell fieldprogrammable gate array (FPGA), which provide powerful solutions for useful functions, such as digital signal processing (DSP) and polyphase filtering. Other circuit concepts are described, including a voltage-controlled oscillator (VCO) with a tuning range of 26 GHz and a high-performance (80 Gb/s) crossbar switch, which provide utility in reconfigurable system applications. Measured results from fabricated implementations of these described systems are presented. We comment on future prospects of these systems and examine an emerging lateral bipolar device (f T ¼ 825 GHz) having 100Â less power consumption than conventional vertical HBTs.

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“…One implementation of power gate methods is shown in Fig. 9, which uses a high‐speed data path portion built with HBTs while using FETs for the relatively slower configuration circuits [31]. The signal level is set to make sure the FETs Q4–Q5 operate between the triode and cutoff regions.…”

Section: Power‐speed Optimisation Strategymentioning

confidence: 99%

Design of BiCMOS SRAMs for high‐speed SiGe applications

LeRoy

Clarke

Chu

et al. 2014

IET Circuits, Devices & Systems

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This study documents the speeds of various SRAM buffer memories that are possible in a contemporary fast SiGe heterojunction bipolar transistor (HBT) BiCMOS process. An SRAM in a 0.13 µm HBT BiCMOS technology using current mode logic (CML)-style circuits serves as a basis for the discussion. This basic SRAM design features a CML decoder, CML word line driver, bipolar sense amplifier for achieving high speed and CMOS 6T memory cells for high density. The BiCMOS technology is especially useful for realising ultra-high-speed SRAMs for low level cache memory in high-clock rate computer systems, but when reorganised can also be utilised in analogue-to-digital converter (ADC) systems to store digitalised data. Speed and power tradeoffs can be made using different bias strategies, CML logic levels and different generations of SiGe HBTs. A demonstrated 128 kb SRAM macro consumes 2.7 W at 4 GHz using a −3.4 and −1.5 V supply voltage for the bipolar and CMOS circuits, respectively, and has dimensions of 3.5 mm × 3.6 mm by using IBM 8HP SiGe technology, which provides an HBT with a f T of 210 GHz. This macro can be integrated into large scale, ultra-wide bus SRAMs using heterogeneous silicon and 3D technology. Simulation indicates that with the next generation of SiGe HBTs, this SRAM macro can operate at 5 GHz, while consuming the same amount of power or alternatively consume 0.73 W, which is 73% less power consumption compared to 8HP, while operating with the same frequency of 4 GHz. Reorganising the memory for a 4 way-interleaved ADC, it can accept data written at 9.5 GS/s for 8HP designs, and 11.9 GS/s for 8XP designs.

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Reconfigurable 40 GHz BiCMOS uniform delay crossbar switch for broadband and wide tuning range narrowband applications

Cited by 5 publications

References 16 publications

Testing a Nanocrossbar for Multiple Fault Detection

Testing a Nanocrossbar for Multiple Fault Detection

High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology

Design of BiCMOS SRAMs for high‐speed SiGe applications

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