Realization of 850V breakdown voltage LDMOS on Simbond SOI

Wang, Zhongjian; Cheng, Xinbin; He, Dingyong; Xia, Chao; Xu, Di; Yu, Yuehui; Zhang, Dong; Wang, Yanying; Lv, Yuqiang; Gong, Dunwei; Kai, Shao

doi:10.1016/j.mee.2011.10.014

Cited by 19 publications

(6 citation statements)

References 7 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Step Doping (LSD) techniques [5]- [13]. However, due to the limitation of actual process or the requirement of design, the vertical doping profile can hardly be uniform.…”

Section: Introductionmentioning

confidence: 99%

An Analytical Breakdown Model for the SOI LDMOS With Arbitrary Drift Doping Profile by Using Effective Substrate Voltage Method

Yang

Guo

Zhang

et al. 2020

IEEE J. Electron Devices Soc.

View full text Add to dashboard Cite

To elaborate on the relationship between sophisticated 2-D doping profile of drift region and device's breakdown behavior, a unified analytical model for the SOI LDMOS is developed in this paper. The Effective Substrate Voltage (ESV) concept is proposed so that the derivation of electric field and breakdown voltage can be simplified significantly. The ESV indicates that the influence of 2-D doping in the drift region can be equivalent to a virtual substrate potential. By using the proposed model, the role of 2-D drift doping, both continuous or discrete doping profile, in SOI LDMOSs' off-state breakdown behavior is investigated along with the TCAD simulations and experimental results. The good agreement between the analytical, measured and simulated results validates the accuracy of the developed model. A unified RESURF criterion is derived to idealize the electric field in the drift region and therefore maximize the breakdown voltage by optimizing the lateral and vertical drift doping profiles and geometric parameters. The proposed approach provides a universally applicable tool to explore the breakdown mechanism of SOI LDMOS with various drift doping profiles. INDEX TERMS LDMOS, arbitrary doping profile, electric field, breakdown voltage (BV).

show abstract

“…Step Doping (LSD) techniques [5]- [13]. However, due to the limitation of actual process or the requirement of design, the vertical doping profile can hardly be uniform.…”

Section: Introductionmentioning

confidence: 99%

An Analytical Breakdown Model for the SOI LDMOS With Arbitrary Drift Doping Profile by Using Effective Substrate Voltage Method

Yang

Guo

Zhang

et al. 2020

IEEE J. Electron Devices Soc.

View full text Add to dashboard Cite

show abstract

“…However, it can be concluded that these structures still suffer the premature breakdown because of the high electric field at the end of the drift region. A few methods for modulating the surface electric field have been delivered in SJ LDMOS such as the buffer layer [21], the buried layer [22], the variable lateral doping [23], the variable lateral thickness [24], and so on . However, more masks would be required to fabricate, the process complexity and fabrication cost would increase.…”

Section: Introductionmentioning

confidence: 99%

Improving breakdown performance for SOI LDMOS with sidewall field plate

Tang

Wang

Bao

et al. 2019

Micro & Nano Letters

View full text Add to dashboard Cite

In this work, a silicon-on-insulator (SOI) lateral diffused MOSFET (LDMOS) incorporated with sidewall field plate (SEP) is presented and investigated using three-dimensional numeric simulation. A new additional electric field peak is formed, due to the compound field plate established along the n-drift region. The lateral surface electric field can be modulated, which enhances the breakdown voltage. Meanwhile, the doping concentration of n-drift region is increased, which decreases the specific on-resistance. Compared with the superjunction LDMOS, a 23.7% increase in the breakdown voltage and a 21.7% decrease in the specific on-resistance are obtained in the SFP-LDMOS device.

show abstract

“…The Variation of Lateral doping (VLD) technique is an effective method to achieve an ideal uniform lateral electric field. [6] In our previous study, the Variation of Lateral Thickness (VLT) technique is proposed to uniformize the lateral electric field and maximize the lateral BV. [7] The Variation of Lateral Width technique together with the high-k dielectric (VLWHK) is also employed to improve the issue [8] .…”

Section: Introductionmentioning

confidence: 99%

Novel high-voltage LDMOS with linear graded drift region width

Yao

Guo

Zhang

et al. 2015

2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC)

View full text Add to dashboard Cite

In this paper, a novel Lateral Diffused Metal Oxide Semiconductor (LDMOS) with linear graded drift region width is proposed. The device features a specific drift region with the lateral width increasing from source to drain, which modulates the electric field distribution and increases the doping concentration. The breakdown voltage exceeds 600V on the proposed LDMOS with 1 m SOI layer, 3 m buried oxide and 60 m drift region length. The characteristics are investigated by a three dimensional simulator. The simulation results show that a 135% increase in breakdown voltage and 5 times increase in figure of merits are achieved for the proposed device when compared with those of the conventional device.

show abstract

Realization of 850V breakdown voltage LDMOS on Simbond SOI

Cited by 19 publications

References 7 publications

An Analytical Breakdown Model for the SOI LDMOS With Arbitrary Drift Doping Profile by Using Effective Substrate Voltage Method

An Analytical Breakdown Model for the SOI LDMOS With Arbitrary Drift Doping Profile by Using Effective Substrate Voltage Method

Improving breakdown performance for SOI LDMOS with sidewall field plate

Novel high-voltage LDMOS with linear graded drift region width

Contact Info

Product

Resources

About