Real-time adjustment of power management policy for a time-based power control architecture

Abstract

As state-of-the-art mobile devices are demanded for high performance and attractive designs, system-on-chips have been integrated with many functional blocks into a single chip to reduce the chip size, cost, and power consumption. In this paper, to reduce power consumption of heterogeneous processor, a power management algorithm is proposed with a time-based power control architecture which autonomously performs voltage/clock scaling operations without the intervention of the processors. The proposed algorithm has adaptively adjusted time-threshold levels for voltage/clock control to minimize the power consumption and work in severe time-constraints for real-time processing. The real-time adjustment makes robust performance of the power consumption guarantee regardless of patterns of data traffic and diverse application programs. To show performance of the proposed, they are adopted to an application processor integrated with a communication processor for smartphones. Via electronic system-level simulation, it is shown that the proposed algorithm reduces the power consumption by approximately 40%.

High-performance low-power application processor integrated with modem processor

“…Whenever the environment fluctuates, it is difficult to set an optimal value, that is, to minimize the power consumption while maintaining the performance. Therefore, to track the optimal threshold value for variable input condition while keeping time constraints, the APM uses real-time control algorithms [4], [5].…”

Low-power shared memory architecture power mode for mobile system-on-chip

“…If the modem processor requests read/write operations when the memory interface blocks are off, the power control block turns on the memory interface blocks. The read/write operations are kept for certain duration in the power control block until the memory interface blocks are completely on [1,2]. Since the operation frequency of a modem and an AP differs, an asynchronous bridge block controls the clocks in the shared memory architecture.…”