2019
DOI: 10.3390/electronics8030282
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Random Dopant Fluctuation-Induced Variability in n-Type Junctionless Dual-Metal Gate FinFETs

Abstract: We investigate the effect of random dopant fluctuation (RDF)-induced variability in n-type junctionless (JL) dual-metal gate (DMG) fin field-effect transistors (FinFETs) using a 3D computer-aided design simulation. We show that the drain voltage (VDS) has a significant impact on the electrostatic integrity variability caused by RDF and is dependent on the ratio of gate lengths. The RDF-induced variability also increases as the length of control gate near the source decreases. Our simulations suggest that the p… Show more

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Cited by 5 publications
(3 citation statements)
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References 25 publications
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“…where N s v − → ρ is one doping profile randomization with the sample index ν for the doping species s. The green's function G s c (⃗ ρ) is called an impedance field, and it does not depend on the randomization of the doping profile. RDF can significantly affect the reliability and aging of the device [38][39][40]. The impact of varying RDF for the 50 samples with different gas pressures on I DS -V GS curves, V TH , normal quantile of V TH deviation, and standard deviation of the V TH with varying RDF are shown in figure 10.…”
Section: Effect Of the Rdfmentioning
confidence: 99%
“…where N s v − → ρ is one doping profile randomization with the sample index ν for the doping species s. The green's function G s c (⃗ ρ) is called an impedance field, and it does not depend on the randomization of the doping profile. RDF can significantly affect the reliability and aging of the device [38][39][40]. The impact of varying RDF for the 50 samples with different gas pressures on I DS -V GS curves, V TH , normal quantile of V TH deviation, and standard deviation of the V TH with varying RDF are shown in figure 10.…”
Section: Effect Of the Rdfmentioning
confidence: 99%
“…Since FinFET devices are not doped, the current density is very high at the channel-gate-oxide interface which causes acceleration of the charge carrier to interface into the gate oxide from the channel and it further increases with the stress [3]. Junctionless-FinFET also has a potential to replace the conventional MOSFET but it also has a problem of BTI and process variation [4]. Hence, it is a primary need to design a robust SRAM memory.…”
Section: Introductionmentioning
confidence: 99%
“…These variation sources result in statistical variability of device electrical characteristics and, consequently, inverter delay, which is the main figure‐of‐merit in digital IC design. Although random dopant fluctuation (RDF) induced variability has been comprehensively discussed [24], there is still a lack of research on RDF‐induced variations in the timing characteristics of a CMOS inverter when the FE negative capacitor is connected. Furthermore, the electrical characteristics of an inverter chain and complicated circuits are seldom reported to comprehensively evaluate low‐power consumption characteristics in NCFET.…”
Section: Introductionmentioning
confidence: 99%