Radiation hardened PowerPC 603e/sup TM/ based single board computer

Brown, G.R.

doi:10.1109/dasc.2001.964228

Cited by 4 publications

(3 citation statements)

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“…A good candidate for a system controller is the Honeywell radiation hardened RHPPC Single Board Computer (SBC.) This radiation hardened SBC is based on Motorola 603e microprocessor technology [5]. Key features of the RHPCC SBC are summarized in Table 1-1.…”

Section: System Controllermentioning

confidence: 99%

“…The industry proposed solution is to reduce the demand on the downlink by moving processing onto the spacecraft. This approach is hampered by the limited capabilities of today's on-board processors and the prohibitive cost of developing radiation hardened highperformance electronics [4,5]. This has partly encouraged the industry to consider the use of COTS components [6].…”

Section: Introductionmentioning

confidence: 98%

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Environmentally Adaptive Fault Tolerant Computing (EAFTC)

Ramos

Brenner

Galica

et al. 2005

2005 IEEE Aerospace Conference

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1,2 The application of commercial-off-the-shelf (COTS) processing components in operational space missions with optimal performance and efficiency requires a system-level approach. Of primary concern is the need to handle the inherent susceptibility of COTS components to Single Event Upsets (SEUs). Honeywell in conjunction with Physical Sciences Incorporated, and WW Technology Group has developed a new paradigm for fault tolerant COTS based onboard computing. The paradigm is called "Environmentally Adaptive Fault Tolerant Computing" (EAFTC.) EAFTC combines a set of innovative technologies to enable efficient use of high performance COTS processors, in the harsh space environment, while maintaining the required system availability.

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Section: System Controllermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 98%

Environmentally Adaptive Fault Tolerant Computing (EAFTC)

Ramos

Brenner

Galica

et al. 2005

2005 IEEE Aerospace Conference

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“…Therefore, there is a need for many-core processors for space applications. There are a few processors designed for space applications [5][6][7][8]. Those processors have at most two CPU cores in them [7,8].…”

Section: Introductionmentioning

confidence: 99%

Implementation of kernels on the Maestro processor

Suh

Kang

Crago

2013

2013 IEEE Aerospace Conference

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Currently, most microprocessors use multiple cores to increase performance while limiting power usage. Some processors use not just a few cores, but tens of cores or even 100 cores. One such many-core microprocessor is the Maestro processor, which is based on Tilera's TILE64 processor. The Maestro chip is a 49-core, general-purpose, radiation-hardened processor designed for space applications. The Maestro pro cessor, unlike the TILE64, has a floating point unit (FPU) in each core for improved floating point performance. The Maestro processor runs at 342 MHz clock frequency.On the Maestro processor, we implemented several widely used kernels: matrix multiplication, vector add , FIR filter, and FFT. We measured and analyzed the performance of these kernels.The achieved performance was up to 5.7 GFLOPS, and the speedup compared to single tile was up to 49 using 49 tiles.

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Techniques to Enable FPGA Based Reconfigurable Fault Tolerant Space Computing

Smith

Torre

2006 IEEE Aerospace Conference

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Radiation hardened PowerPC 603e/sup TM/ based single board computer

Cited by 4 publications

References 0 publications

Environmentally Adaptive Fault Tolerant Computing (EAFTC)

Environmentally Adaptive Fault Tolerant Computing (EAFTC)

Implementation of kernels on the Maestro processor

Techniques to Enable FPGA Based Reconfigurable Fault Tolerant Space Computing

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