Radiation effects in SOI technologies

The Influence of Device Geometry on the Partially Depleted Soi Transistor Tid Hardness

“…That dependence was caused by different field distribution in the buried oxide for short and longchannel devices under the TG bias as was shown in [19]. For long gate, drain and source bias only enhance charge trapping in local areas around the source and drain, having little effect on the central area under the gate.…”

“…Some benefits can be gained by careful transistor type and process parameters selection and suitable substrate biasing [19]. Prior theoretical conclusions on radiation hardness of SOI devices are difficult to draw, thus experiment needs to be carried out.…”

3-D Quantum Numerical Simulation of Transient Response in Multiple-Gate Nanowire MOSFETs Submitted to Heavy Ion Irradiation

“…The bipolar amplification is a phenomenon specific to partially-depleted SOI devices and its basic mechanism was largely explained and simulated in previous works (Ferlet-Cavrois et 81 al., 2002;Ferlet-Cavrois et al, 2004;Schwank et al, 2003). Bipolar amplification can also occur in fully depleted devices, as those studied here.…”

Total-Ionizing-Dose Effects on Threshold Switching in $1{T}$ -TaS2 Charge Density Wave Devices

“…These can result in shifts of the threshold voltage, increases in static current leakage, errors in bit reading, and, eventually, in complete circuit and/or system failure [1], [2]. Strategies for increasing the radiation resilience of electronic devices typically include improving oxide quality [4], adopting silicon-on-insulator technology [5], and/or using III-V transistors with no oxide layers [6]. Commercial microelectronic devices can often withstand TID exposure to about 1-100 krad(SiO 2 ), and radiation hardened devices typically can withstand doses well above 100 krad(SiO 2 ) [7].…”