Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning

Bera, Rahul; Kanellopoulos, Konstantinos; Nori, Anant; Shahroodi, Taha; Subramoney, Sreenivas; Mutlu, Onur

doi:10.1145/3466752.3480114

Cited by 39 publications

(21 citation statements)

References 122 publications

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“…We develop a post-deduplication deltacompression platform that is used as a general workbench to implement and evaluate various reference search techniques. 4 Our platform runs on a server machine that employs Intel's Xeon 4110 CPU with 8 cores running at 2.1 GHz, 128-GB DDR4 DRAM, and 8 Samsung 860PRO 1-TB SSDs, while using GeForce RTX 2080 for DNN inference DeepSketch. Our platform operates as described in Figure 1; for every host write, it performs deduplication, delta compression, and lossless compression in order.…”

Section: Methodsmentioning

confidence: 99%

“…Hidden Layers reference block search in post-deduplication delta compression, another nearest-neighbor search problem. In particular, rapid advances in machine learning have enabled learningbased algorithms to outperform a human or human-made heuristics in various problems, such as facial recognition [65], speech recognition [83,84], image classification [50], and system optimizations (e.g., branch prediction [37,38], memory scheduling [35], and prefetching [4]). These successful examples motivate us to develop a learning-based sketching scheme that could be more effective than existing LSH-based sketching schemes relying on human-designed heuristics and metrics.…”

Section: Output Layermentioning

confidence: 99%

“…First, there is no well-defined labeled data or semantic information (e.g., cats, dogs, and monkeys in image classification) within our target data sets. Second, possible bit patterns of a data block have an extremely high dimensional space (e.g., 2 4,096×8 unique bit patterns for a 4-KiB data block). Due to the high dimensionality of the target data set, it is difficult to collect large enough data to train the DNN with high inference accuracy using known training methods.…”

Section: Introductionmentioning

confidence: 99%

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DeepSketch: A New Machine Learning-Based Reference Search Technique for Post-Deduplication Delta Compression

Park¹,

Kim²,

Kim³

et al. 2022

Preprint

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Data reduction in storage systems is becoming increasingly important as an effective solution to minimize the management cost of a data center. To maximize data-reduction efficiency, existing post-deduplication delta-compression techniques perform delta compression along with traditional data deduplication and lossless compression. Unfortunately, we observe that existing techniques achieve significantly lower data-reduction ratios than the optimal due to their limited accuracy in identifying similar data blocks.In this paper, we propose DeepSketch, a new reference search technique for post-deduplication delta compression that leverages the learning-to-hash method to achieve higher accuracy in reference search for delta compression, thereby improving data-reduction efficiency. DeepSketch uses a deep neural network to extract a data block's sketch, i.e., to create an approximate data signature of the block that can preserve similarity with other blocks. Our evaluation using eleven realworld workloads shows that DeepSketch improves the datareduction ratio by up to 33% (21% on average) over a stateof-the-art post-deduplication delta-compression technique.

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Section: Methodsmentioning

confidence: 99%

Section: Output Layermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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DeepSketch: A New Machine Learning-Based Reference Search Technique for Post-Deduplication Delta Compression

Park¹,

Kim²,

Kim³

et al. 2022

Preprint

Self Cite

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“…Reinforcement learning (RL) is a commonly employed technique to solve architectural optimization problems such as branch prediction [196], memory scheduling [74,131], prefetching [13,144], dynamic voltage swing control for I/O communication [40], and garbage collection [76]. Among RL techniques, Q-learning [185] is a preferable method due to its simplicity and model-free nature, making it a practical and effective solution.…”

Section: Random Number Buffering Mechanismmentioning

confidence: 99%

DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators

Bostancı¹,

Olgun²,

Orosa³

et al. 2022

Preprint

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Random number generation is an important task in a wide variety of critical applications including cryptographic algorithms, scientific simulations, and industrial testing tools. True Random Number Generators (TRNGs) produce cryptographicallysecure truly random data by sampling a physical entropy source that typically requires custom hardware and suffers from long latency. To enable high-bandwidth and low-latency TRNGs on widely-available commodity devices, recent works propose hardware TRNGs that generate random numbers using commodity DRAM as an entropy source. Although prior works demonstrate promising TRNG mechanisms using DRAM, practical integration of such mechanisms into real systems poses various challenges.We identify three key challenges for using DRAM-based TRNGs in current systems: (1) generating random numbers with DRAM-based TRNGs can degrade overall system performance by slowing down concurrently-running applications due to the interference between RNG and regular memory operations in the memory controller (i.e., RNG interference), (2) this RNG interference can degrade system fairness by causing unfair prioritization of applications that intensively use random numbers (i.e., RNG applications), and (3) RNG applications can experience significant slowdown due to the high latency of DRAM-based TRNGs.To address these challenges, we propose DR-STRaNGe, an end-to-end system design for DRAM-based TRNGs that (1) reduces the RNG interference by separating RNG requests from regular memory requests in the memory controller, (2) improves fairness across applications with an RNG-aware memory request scheduler, and (3) hides the large TRNG latencies using a random number buffering mechanism combined with a new DRAM idleness predictor that accurately identifies idle DRAM periods.We evaluate DR-STRaNGe using a comprehensive set of 186 multi-programmed workloads. Compared to an RNG-oblivious baseline system, DR-STRaNGe improves the performance of non-RNG and RNG applications on average by 17.9% and 25.1%, respectively. DR-STRaNGe improves system fairness by 32.1% on average when generating random numbers at a 5 Gb/s throughput. DR-STRaNGe reduces energy consumption by 21% compared to the RNG-oblivious baseline design by reducing the time spent for RNG and non-RNG memory accesses by 15.8%.

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“…A large body of machine learning techniques have been applied to predict high-level system behavior for resource management [4,5,11,14,[35][36][37][38][39][40][41][42][43][44][45][46][47][48] and scheduling [49-51, 56, 57]. The general strategy is to use low-level, readily-available metrics (e.g., branch miss rates, IPC) to predict high-level behavior (e.g., throughput or latency) [11,40,45,[52][53][54][55][58][59][60][61][62][63]. For example, Lee and Brooks [52,64] apply linear regression to predict performance and power.…”

Section: Machine Learning For Behavior Predictionmentioning

confidence: 99%

Cello: Efficient Computer Systems Optimization with Predictive Early Termination and Censored Regression

Ding¹,

Renda²,

Pervaiz³

et al. 2022

Preprint

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Sample-efficient machine learning (SEML) has been widely applied to find optimal latency and power tradeoffs for configurable computer systems. Instead of randomly sampling from the configuration space, SEML reduces the search cost by dramatically reducing the number of configurations that must be sampled to optimize system goals (e.g., low latency or energy). Nevertheless, SEML only reduces one component of cost-the total number of samples collected-but does not decrease the cost of collecting each sample. Critically, not all samples are equal; some take much longer to collect because they correspond to slow system configurations. This paper present Cello, a computer systems optimization framework that reduces sample collection costs-especially those that come from the slowest configurations. The key insight is to predict ahead of time whether samples will have poor system behavior (e.g., long latency or high energy) and terminate these samples early before their measured system behavior surpasses the termination threshold, which we call it predictive early termination. To predict the future system behavior accurately before it manifests as high runtime or energy, Cello uses censored regression to produces accurate predictions for running samples. We evaluate Cello by optimizing latency and energy for Apache Spark workloads. We give Cello a fixed amount of time to search a combined space of hardware and software configuration parameters. Our evaluation shows that compared to the state-ofthe-art SEML approach in computer systems optimization, Cello improves latency by 1.19× for minimizing latency under a power constraint, and improves energy by 1.18× for minimizing energy under a latency constraint.

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Pythia: A Customizable Hardware Prefetching Framework Using Online Reinforcement Learning

Cited by 39 publications

References 122 publications

DeepSketch: A New Machine Learning-Based Reference Search Technique for Post-Deduplication Delta Compression

DeepSketch: A New Machine Learning-Based Reference Search Technique for Post-Deduplication Delta Compression

DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators

Cello: Efficient Computer Systems Optimization with Predictive Early Termination and Censored Regression

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