Pure germanium epitaxial growth on thin strained silicon-germanium graded layers on bulk silicon substrate for high-mobility channel metal-oxide-semiconductor field-effect transistors

Abstract

We demonstrate epitaxially grown high-quality pure germanium (Ge) on bulk silicon (Si) substrates by ultra-high-vacuum chemical vapor deposition (UHVCVD) without involving growth of thick relaxed SiGe buffer layers. The Ge layer is grown on thin compressively strained SiGe layers with rapidly varying Ge mole fraction on Si substrates resulting in several SiGe interfaces between the Si substrate and the pure Ge layer at the surface. The presence of such interfaces between the Si substrate and the Ge layer results in blocking threading dislocation defects, leading to a defect-free pure Ge epitaxial layer on the top. Results from various material characterization techniques on these grown films are shown. In addition, capacitance-voltage (CV) measurements of metal-oxide-semiconductor (MOS) capacitors fabricated on this structure are also presented, showing that the grown structure is ideal for high-mobility metal-oxide-semiconductor field-effect transistor applications.

Near infrared image sensor with integrated germanium photodiodes.

“…The FWHM of the Ge(004) peak is a criterion to assess the the overall layer quality. 4,5 Nevertheless, as the values of the FWHM depend on the specific diffractometer setup used for the analysis 6 and also on sample specifications such as the layer thickness 7 or the use of x (gray, with offset on the intensity scale for clarity) scans for the epitaxial Ge-on-Si system. The inset shows the RSM on the Ge layer peak.…”

Molecular-beam epitaxy growth of device-compatible GaAs on silicon substrates with thin (∼80nm) Si1−xGex step-graded buffer layers for high-κ III-V metal-oxide-semiconductor field effect transistor applications

“…15 The growth of GaAs on the Si substrates utilized a thin ϳ80 nm step-graded Si 1−x Ge x buffer layer grown by ultrahigh vacuum chemical vapor deposition ͑UHVCVD͒. 21 We fabricated MOSCAPs in order to determine the gate's ability to control the underlying semiconductor inversion layer. If no gate control is observed in the MOS capacitor, then it is pointless to proceed with fabricating the MOSFET because it will not function.…”

Mobility Enhancement Technology for Scaling of CMOS Devices: Overview and Status

“…To deposit Ge layers as smooth, atomically flat, relaxed interfaces, Si 1Àx Ge x dislocation blocking layers can be used to fabricate high-mobility Ge-channel pMOSs. 92,93 This process is quite interesting, because it facilitates Si/Ge integration.…”