Pulse amplitude-modulated time-based interface for off-chip interconnect

Rashdan, M.

doi:10.1080/00207217.2016.1178346

Cited by 3 publications

(1 citation statement)

References 9 publications

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“…This problem was solved by combining the AM technique with the time-based technique. 8 A dual-mode PAM technique can be used to increase the data transfer rate, as shown in Song et al 9 This technique employs both differential-mode and common-mode PAMs, and it uses only 10 levels to transmit 4-bit per symbol instead of 16 levels which is common in a standard 16-PAM technique. This modulation also has the NRZ data format, and the clock signal is transmitted on a different channel.…”

Section: Introductionmentioning

confidence: 99%

A 12‐Gb/s serial link transceiver using dual‐mode pulse amplitude modulation scheme in a 0.18‐μm CMOS process

Mohabbatian

Hadidi

2021

Circuit Theory & Apps

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A 12-Gb/s 0.18-μm complementary metal oxide semiconductor (CMOS) serial link transceiver with embedded clock signal in data stream using dual-mode pulse amplitude modulation is presented. The 6-bit data and the clock signal are both transferred through the same transmission channel. In the proposed modulation technique, the clock signal is easily recovered using a conventional phase-locked loop without any complex encoders in the transmitter circuit. The transmitter includes multiplexers, an output driver, and pre-emphasis circuitry with 127-mW power consumption. The receiver is composed of a phase-locked loop for clock recovery and demodulator blocks for data recovery, and it dissipates 45 mW of power.

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Section: Introductionmentioning

confidence: 99%