A 12‐Gb/s serial link transceiver using dual‐mode pulse amplitude modulation scheme in a 0.18‐μm CMOS process

Abstract

A 12-Gb/s 0.18-μm complementary metal oxide semiconductor (CMOS) serial link transceiver with embedded clock signal in data stream using dual-mode pulse amplitude modulation is presented. The 6-bit data and the clock signal are both transferred through the same transmission channel. In the proposed modulation technique, the clock signal is easily recovered using a conventional phase-locked loop without any complex encoders in the transmitter circuit. The transmitter includes multiplexers, an output driver, and pre-emphasis circuitry with 127-mW power consumption. The receiver is composed of a phase-locked loop for clock recovery and demodulator blocks for data recovery, and it dissipates 45 mW of power.