PSBIST: A partial-scan based built-in self-test scheme

Zorian, Y.; Bhawmik, Sudipta

doi:10.1109/test.1993.470660

Cited by 49 publications

(9 citation statements)

References 24 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Another method with multiple capture cycle, which is based on partial scan design, was proposed in [19]. In case of partial scan design, because the multiple capture cycle is useful for initializing states of non-scan flip-flops, high fault coverage can be obtained.…”

Section: A Multiple Capture Cycle Testmentioning

confidence: 99%

See 1 more Smart Citation

On test pattern compaction with multi-cycle and multi-observation scan test

Kajihara

Makoto

Yamaguchi

et al. 2010

2010 10th International Symposium on Communications and Information Technologies

View full text Add to dashboard Cite

This paper proposes a test compaction method for full scan circuits based on multiple capture clock cycles. The multiple cycle test applies more than one capture clock signals for a circuit after scan shift operation, while the capture clock cycle of the conventional scan test is one. Because every captured value at scan flip-flops is used for fault detection, the opportunity of fault detection for each fault increases. As a result, the number of test vectors would be decreased compared with the single cycle mode. Such a test compaction method would be useful in field test that requires less test data so as to store them on-chip. Experimental results show that the proposed method is effective for test compaction.

show abstract

Section: A Multiple Capture Cycle Testmentioning

confidence: 99%

“…In case of partial scan design, because the multiple capture cycle is useful for initializing states of non-scan flip-flops, high fault coverage can be obtained. Even for the method in [19], values at scan flip-flops are observed only for last capture, and other captured values are ignored.…”

Section: A Multiple Capture Cycle Testmentioning

confidence: 99%

On test pattern compaction with multi-cycle and multi-observation scan test

Kajihara

Makoto

Yamaguchi

et al. 2010

2010 10th International Symposium on Communications and Information Technologies

View full text Add to dashboard Cite

show abstract

“…In [10], it was shown that most of the circuits can be initialized through pseudo-random patterns. In [8], BIST approaches that rely on test point insertion are shown to be capable of producing up to 100% fault coverage in partial scan designs. C.-J.…”

Section: Previous Workmentioning

confidence: 99%

“…show how to control the input pins and observe the output pins through boundary scan techniques. Techniques for inserting test points capable of providing increased controllability and observability to areas with hard-to-test faults are outlined in [8].…”

Section: Previous Workmentioning

confidence: 99%

See 1 more Smart Citation

An examination of PRPG selection approaches for large, industrial designs

Bayraktaroglu

Udawatta

Orailoğlu

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259)

View full text Add to dashboard Cite

show abstract

Trends in Digital Device Test Methodologies

Crane¹,

Davidson

Kane

et al. 1994

At&T Technical Journal

View full text Add to dashboard Cite

The rapid movement toward ultra-large-scale integration (ULSI) is significantly increasing the demands on testing technology for digital devices. Evolving test methodologies mustbe well integrated into the overall product realization process -from initial concept, through design, to field support. To maintain ever-increasing quality standards, high-quality tests mustidentify defective units at eachlevel ofsystem hierarchy. In addition, they must isolate faults to allow for efficient replacement and repair. Future demands on testing technology can be divided into sixmajor areas: product quality, device technology, testability scope, process integration, efficiency, and automation.

show abstract

PSBIST: A partial-scan based built-in self-test scheme

Cited by 49 publications

References 24 publications

On test pattern compaction with multi-cycle and multi-observation scan test

On test pattern compaction with multi-cycle and multi-observation scan test

An examination of PRPG selection approaches for large, industrial designs

Trends in Digital Device Test Methodologies

Contact Info

Product

Resources

About