Progress Toward Superconductor Electronics Fabrication Process With Planarized NbN and NbN/Nb Layers

Tolpygo, Sergey K.; Mallek, Justin; Bolkhovsky, Vladimir; Rastogi, Ravi; Golden, Evan; Weir, Terence J.; Johnson, L. M.; Gouker, M.A.

doi:10.1109/tasc.2023.3246430

Cited by 14 publications

(8 citation statements)

References 46 publications

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“…To alleviate resolution limitations, the SC1 process has been recently modified to include a 193 nm photolithography using an ASML PAS5500-1100 scanner [32] to pattern a layer of JJs, J5, and critical layers of inductors, whereas keeping the rest of the fabrication process identical to the SC1. This resulted in a new node, titled SC2, with 150 nm minimum linewidth for critical inductors and 500 nm minimum diameter of JJs in circuits.…”

Section: Description Of Fabrication Processesmentioning

confidence: 99%

“…The etch rate of photoresists used for 193 nm photolithography is higher, and selectivity to Nb is lower, than that of 248 nm photoresists. This necessitates the use of a hard mask process [32], shown schematically in figure 1. Changing multiple critical fabrication processes required reevaluation and calibration of circuit structures, including inductors.…”

Section: Description Of Fabrication Processesmentioning

confidence: 99%

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Inductance of superconductor integrated circuit features with sizes down to 120 nm

Tolpygo

Golden

Weir

et al. 2021

Supercond. Sci. Technol.

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Data are presented on inductance of various features used in superconductor digital integrated circuits such as microstrip and stripline inductors with linewidths down to 120 nm and different combinations of ground plane layers, effect of perforations of various sizes in the ground planes and their distance to the inductors on inductance, inductance of vias of various sizes between adjacent layers and composite vias between distant superconducting layers. Effects of magnetic flux trapping in ground plane moats on coupling to nearby inductors are discussed for circuit cooling in a residual field of several configurations. Test circuits used for the measurements were fabricated in a new 150-nm node of a fully planarized process with eight niobium layers, SC2 process, developed at MIT Lincoln Laboratory for superconductor electronics and in its 250nm node SC1, as well as in the standard fabrication process SFQ5ee. The SC2 process utilizes 193-nm photolithography in combination with plasma etching and chemical mechanical planarization of interlayer dielectrics to define inductors with linewidth down to about 100 nm on critical layers. All other processes use 248-nm photolithography. Effects of variation of process parameters on circuit inductors are discussed. The measured data are compared with the results of inductance extraction using software packages InductEx and wxLC. Part II is devoted to mutual inductance of various closely spaced features in integrated circuits, meanders, and transformers.

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Section: Description Of Fabrication Processesmentioning

confidence: 99%

Section: Description Of Fabrication Processesmentioning

confidence: 99%

Inductance of superconductor integrated circuit features with sizes down to 120 nm

Tolpygo

Golden

Weir

et al. 2021

Supercond. Sci. Technol.

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“…Dependences of the resistivity, 𝜌𝜌, and superconducting critical temperature, 𝑇𝑇 𝑐𝑐 of the reactively sputtered NbN x films on the deposition parameters in the Endura PVD system were studied in [22]. It was observed that the resistivity of NbN x films monotonically increases with increasing N 2 partial pressure, whereas superconducting films, with the highest 𝑇𝑇 𝑐𝑐 of 16 K, are only produced in a relatively narrow range of N 2 partial pressures; see [22,Fig. 5].…”

Section: Fabrication Of Nb/nbn X /Nb Trilayer Junctionsmentioning

confidence: 99%

Self- and Mutual Inductance of NbN and Bilayer NbN/Nb Inductors in a Planarized Fabrication Process With Nb Ground Planes

Tolpygo

Golden

Weir

et al. 2023

IEEE Trans. Appl. Supercond.

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To increase integration scale of superconductor electronics, we are developing a new node, titled SFQ7ee, of the fabrication process at MIT Lincoln Laboratory. In comparison to the existing SFQ5ee node, we increased the number of fully planarized superconducting layers to ten and utilized NbN and NbN/Nb kinetic inductors to increase the possible inductor number density above a hundred million inductors per cm 2 . Increasing the Josephson junction number density to the same level requires implementing self-shunted high-Jc Josephson junctions. We investigated properties of Nb/NbNx/Nb trilayer junctions as a potential replacement of high-Jc Nb/Al-AlOx/Nb junctions, where NbNx is a disordered, overstoichiometric, nonsuperconducting nitride deposited by reactive sputtering. Dependences of the IcRn product and Josephson critical current density, Jc on the NbNx barrier thickness and on temperature were studied in the thickness range from 5 nm to 20 nm. The fabricated junctions can be well described by the microscopic theory of SNS junctions, assuming no suppression of the energy gap in Nb electrodes near the NbNx interfaces and a Cooper pair decay length in the NbNx barrier, 𝝃𝝃 𝒏𝒏 (𝑻𝑻 𝒄𝒄 ), of about 2.3 nm. Currentvoltage characteristics of the junctions are well described by the resistively and capacitively shunted junction (RCSJ) model without excess current. In the studied range Jc < 10 mA/µm 2 , the Nb/NbNx/Nb junctions have lower values of the specific resistance RnA, lower IcRn products, and a stronger dependence of the IcRn on temperature than the self-shunted or critically damped externally shunted Nb/Al-AlOx/Nb junctions with the same critical current density; A is the junction area, Ic the junction critical current, and Rn the effective shunting resistance.

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“…Its width may coincide with the width of the composite electrode, and may be determined by the requirements for the line width of a technological process. In MIT Lincoln Laboratory technology, the lower and upper limits on W (150 nm W 250 nm) are determined by the requirement of current carrying capacity and uniformity of the bias current distribution across the width of the electrodes, respectively [79]. There are no strict requirements for the reproducibility of the gap between the electrodes formulated in [67].…”

Section: Correct Determination Of ϕ As Measured By Experimentsmentioning

confidence: 99%

Contribution of Processes in SN Electrodes to the Transport Properties of SN-N-NS Josephson Junctions

et al. 2023

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In this paper, we present a theoretical study of electronic transport in planar Josephson Superconductor–Normal Metal–Superconductor (SN-N-NS) bridges with arbitrary transparency of the SN interfaces. We formulate and solve the two-dimensional problem of finding the spatial distribution of the supercurrent in the SN electrodes. This allows us to determine the scale of the weak coupling region in the SN-N-NS bridges, i.e., to describe this structure as a serial connection between the Josephson contact and the linear inductance of the current-carrying electrodes. We show that the presence of a two-dimensional spatial current distribution in the SN electrodes leads to a modification of the current–phase relation and the critical current magnitude of the bridges. In particular, the critical current decreases as the overlap area of the SN parts of the electrodes decreases. We show that this is accompanied by a transformation of the SN-N-NS structure from an SNS-type weak link to a double-barrier SINIS contact. In addition, we find the range of interface transparency in order to optimise device performance. The features we have discovered should have a significant impact on the operation of small-scale superconducting electronic devices, and should be taken into account in their design.

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Progress Toward Superconductor Electronics Fabrication Process With Planarized NbN and NbN/Nb Layers

Cited by 14 publications

References 46 publications

Inductance of superconductor integrated circuit features with sizes down to 120 nm

Inductance of superconductor integrated circuit features with sizes down to 120 nm

Self- and Mutual Inductance of NbN and Bilayer NbN/Nb Inductors in a Planarized Fabrication Process With Nb Ground Planes

Contribution of Processes in SN Electrodes to the Transport Properties of SN-N-NS Josephson Junctions

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