Printed Logic Gates Based on Enhancement- and Depletion-Mode Electrolyte-Gated Transistors

Marques, Gabriel Cadilha; Birla, Anushka; Arnal, August; Dehm, Simone; Ramón, Eloi; Tahoori, Mehdi B.; Aghassi‐Hagmann, Jasmin

doi:10.1109/ted.2020.3002208

Cited by 12 publications

(12 citation statements)

References 28 publications

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“…Naturally, the depletion-load type NMOS based all-oxide inverters have been reported more often, which include signal gain value as high as 198, albeit high operation voltage (V DD = 40 V) and annealing temperature have been necessary. [5,7,8,[29][30][31] Next, when it comes to AC performance, the general consensus is that the electrolyte-gated TFTs may not be suitable for higher operation frequency; indeed printed oxide TFTs based R-mode (resistor-transistor logic) NMOS inverters and ring oscillators have demonstrated operation frequency not more than 352 Hz. [32] In fact, the highest operation frequency that has been reported so far involving electrolyte gating is with ambipolar carbon nanotubes (CNTs), where a maximum switching frequency of 22 kHz has been reported.…”

Section: Introductionmentioning

confidence: 99%

“…Naturally, the depletion‐load type NMOS based all‐oxide inverters have been reported more often, which include signal gain value as high as 198, albeit high operation voltage ( V DD = 40 V) and annealing temperature have been necessary. [ 5,7,8,29–31 ]…”

Section: Introductionmentioning

confidence: 99%

“…[22][23][24][25][26][27][28] In contrast, all NMOS depletion-load inverters have become a popular choice in the recent times. [5,7,8,[29][30][31] In fact, one may expect relatively higher performance in this case, when only the superior NMOS TFTs are used. On the other hand, the fabrication routine for the depletion-load type inverters may actually be simpler with identical TFTs at the load and drive positions.…”

Section: Introductionmentioning

confidence: 99%

“…The dynamic response of In 2 O 3 nanoparticle based depletion-load inverter at a supply voltage of V DD = 2 V and operating at a frequency of a) 60, b) 300,and c) 350 kHz, respectively. d) Operation frequency of solution-processed inverters compared with the values reported in the literature [1,9,31,33,[49][50][51]. e,f) Comparison of switching response of In 2 O 3 nanoparticle-based inverter operated at frequency of 100 kHz and placed in the parallel orientation (drive currents parallel strain direction), where e) represents data measured at as-prepared (r = infinity) condition and f) measured after subjecting to a bending fatigue test with bending radius down to 2.5 mm; g,h) present the performance of the inverter compared at operation frequency of 120 kHz, where it is placed in the perpendicular orientation with respect to the bending strain and g) shows data of the as-prepared (r = infinity) condition and h) performance after subjecting to a bending radius of 1.5 mm.…”

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confidence: 99%

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High Operation Frequency and Strain Tolerance of Fully Printed Oxide Thin Film Transistors and Circuits on PET Substrates

Divya

Pradhan

Priyadarsini

et al. 2022

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The major limitations of solution‐processed oxide electronics include high process temperatures and the absence of necessary strain tolerance that would be essential for flexible electronic applications. Here, a combination of low temperature (<100 °C) curable indium oxide nanoparticle ink and a conductive silver nanoink, which are used to fabricate fully‐printed narrow‐channel thin film transistors (TFTs) on polyethylene terephthalate (PET) substrates, is proposed. The metal ink is printed onto the In2O3 nanoparticulate channel to narrow the effective channel lengths down to the thickness of the In2O3 layer and thereby obtain near‐vertical transport across the semiconductor layer. The TFTs thus prepared show On/Off ratio ≈106 and simultaneous maximum current density of 172 µA µm−1. Next, the depletion‐load inverters fabricated on PET substrates demonstrate signal gain >200 and operation frequency >300 kHz at low operation voltage of VDD = 2 V. In addition, the near‐vertical transport across the semiconductor layer is found to be largely strain tolerant with insignificant change in the TFT and inverter performance observed under bending fatigue tests performed down to a bending radius of 1.5 mm, which translates to a strain value of 5%. The devices are also found to be robust against atmospheric exposure when remeasured after a month.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

mentioning

confidence: 99%

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High Operation Frequency and Strain Tolerance of Fully Printed Oxide Thin Film Transistors and Circuits on PET Substrates

Divya

Pradhan

Priyadarsini

et al. 2022

Small

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“…While, most of the examples of pseudo-CMOS, all-oxide inverters have used ultrahigh vacuum physical vapor deposition techniques, [23][24][25] recent examples include solution-processed devices as well. [26][27][28][29][30][31][32][33][34][35][36][37][38][39] On the other hand, the solution-processed or printed electronic devices, especially the ones fabricated using industrial jetting-type printing techniques, suffer from poor printing Oxide electronics has received increasing research and industrial attention in recent years. Solution-processed/printed thin film transistors (TFTs) have rapidly matured to challenge its organic counterparts.…”

mentioning

confidence: 99%

Inkjet‐Printed, Deep Subthreshold Operated Pseudo‐CMOS Inverters with High Voltage Gain and Low Power Consumption

Pradhan

Singh

Dasgupta

2022

Adv Elect Materials

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Oxide electronics has received increasing research and industrial attention in recent years. Solution‐processed/printed thin film transistors (TFTs) have rapidly matured to challenge its organic counterparts. However, when the n‐type oxides can demonstrate high mobility band transport, the performance of the p‐type ones is still weak. Consequently, examples of all‐oxide circuits are rare in the literature. Here printed amorphous indium‐gallium‐zinc oxide (a‐IGZO) based all‐oxide pseudo‐CMOS inverters, ring oscillators, and static random access memories (SRAMs), where the doping density and the device aspect ratio‐controlled deep‐subthreshold region offers sharp switching of the input signal is shown. For example, the signal gain (η) of pseudo‐CMOS 2T and 4T inverters is recorded as 285 and 329, respectively. Furthermore, the deep subthreshold operation ensures low dynamic power consumption, only few tens of nanowatts up to 1.5 V supply voltage. The inverters have demonstrated rail‐to‐rail swing up to 30 kHz and the 3‐stage ring oscillators recorded oscillation frequency of 6.7 kHz. The SRAM devices have shown satisfactory noise margins at HOLD‐, READ‐, and WRITE‐states, while their transient response is also recorded. These fully‐printed all‐oxide TFTs and circuits can be of large interest in portable/wearable electronics, display backplanes, interfacing circuits for sensors, etc.

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Wetting Behavior of Inkjet-Printed Electronic Inks on Patterned Substrates

Arya,

Wu,

Wang

et al. 2024

Langmuir

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In inkjet printing technology, one important factor influencing the printing quality and reliability of printed films is the interaction of the jetted ink with the substrate surface. This short-range interaction determines the wettability and the adhesion of the ink to the solid surface and is hence responsible for the final shape of the deposited ink. Here, we investigate wetting morphologies of inkjet-printed inks on patterned substrates by carefully designed experimental test structures and simulations. The contact angles, the surface properties, and drop shapes, as well as their influence on the device variability, are experimentally and theoretically analyzed. For the simulations, we employ the phase-field method, which is based on the free energy minimization of the two-phase system with the given wetting boundary conditions. Through a systematic investigation of printed drops on patterned substrates consisting of hydrophilic and hydrophobic areas, we report that the printed morphology is related not only to the designed layout and the drop volume but also to the printing strategy and the wettability. Furthermore, we show how one can modify the intrinsic wettability of the patterned substrates to enhance the printing quality and reliability. Based on the present findings, we cast light on the improvement of the fabrication quality of thin film transistors.

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Printed Logic Gates Based on Enhancement- and Depletion-Mode Electrolyte-Gated Transistors

Cited by 12 publications

References 28 publications

High Operation Frequency and Strain Tolerance of Fully Printed Oxide Thin Film Transistors and Circuits on PET Substrates

High Operation Frequency and Strain Tolerance of Fully Printed Oxide Thin Film Transistors and Circuits on PET Substrates

Inkjet‐Printed, Deep Subthreshold Operated Pseudo‐CMOS Inverters with High Voltage Gain and Low Power Consumption

Wetting Behavior of Inkjet-Printed Electronic Inks on Patterned Substrates

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