Power distribution topology design

Abstract

We propose topology design of power distribution nets using a novel method for capturing the temporal characteristics of sink currents -the current compatibility graph. This graph carries information necessary for net area optimization. We propose a new algorithm for simultaneous topology design and wire sizing that can handle large designs. Our techniques result in significant area improvements on benchmark instances.

Power minimization in IC design

“…Careful power distribution is thus becoming more important at lower supply voltages. In [164], a technique for concurrent topology design and wire sizing in power distribution networks is presented. The objective is to minimize the layout area while limiting the average current density to avoid electromigration-induced reliability problems and large resistive voltage drops.…”