Potential fluctuations due to Pb centres at the interface

Uren, M. J.; Brunson, K.M.; Stathis, J. H.; Cartier, E.

doi:10.1016/s0167-9317(97)00052-x

Cited by 22 publications

(13 citation statements)

References 10 publications

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“…3,4 The performance and reliability of a MOS device is significantly influenced by the quality of the grown Si/ SiO 2 interface. The D it reported for the ͑100͒ face is far higher than observed by other groups, [12][13][14] while the two peaks on all D it ͑E͒ profiles are much closer to the Si band gap edges than reported by other researchers for the ͑100͒ and ͑111͒Si face orientations. [6][7][8][9][10][11] So far only the ͑100͒Si/ SiO 2 and ͑111͒Si/ SiO 2 interfaces have been extensively investigated, for more than 50 years, less so the ͑110͒Si/ SiO 2 one.…”

Section: Introductionsupporting

confidence: 44%

“…Studies of Si/ SiO 2 interface traps using MOS capacitors were first introduced by Terman, 5 and then extended in other works. [12][13][14][15][16][17][18][19][20] The goal of this work is to provide dependable information regarding the electrical behavior of ͑110͒Si/ SiO 2 interface traps as analyzed by current state-of-the art electrical techniques using three methods. In the 1960s, using the temperature-dependent capacitance-voltage ͑CV͒ technique, Gray and Brown 6 evaluated the density of interface states D it versus energy, E, at SiO 2 / Si interfaces for three silicon interface orientations.…”

Section: Introductionmentioning

confidence: 99%

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Interface state energy distribution and Pb defects at Si(110)/SiO2 interfaces: Comparison to (111) and (100) silicon orientations

Thoan

Keunen

Afanasʼev

et al. 2011

Journal of Applied Physics

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Traps at the (110)Si/SiO2 interface are investigated by combining electrical methods with electron spin resonance (ESR) measurements, and the results are compared to the well studied (100) and (111)Si/SiO2 interfaces. At all three Si crystal faces, the interface trap density Dit as function of energy E in the Si band gap exhibits two peaks at about 0.25 and 0.85 eV above the Si valence band, found to be well correlated with Pb(0) centers (Si3≡Si• defects). By comparing capacitance-voltage (CV) curves at 300 and 77 K of both n- and p-type samples, the Pb(0) defects are confirmed to be amphoteric. Effective passivation of interface traps by H2 annealing suggests that Pb0 defects are responsible for most of interface traps observed in (110)Si/SiO2. The truly amphoteric behavior, implying that one Pb0 defect delivers two interface trap levels, was observed for the (100) and (111)Si faces but not for the (110) face. The estimated interface trap density Nit at the (110)Si/SiO2 interface oxidized at 930 °C is (6.7±0.5)×1012, while the Pb0 density as determined by ESR is about (6±1)×1012 cm−2. Lowering of the oxidation temperature leads to further reduction in the electrically active Pb0 centers fraction at the (110)Si/SiO2 interface.

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Section: Introductionsupporting

confidence: 44%

Section: Introductionmentioning

confidence: 99%

Interface state energy distribution and Pb defects at Si(110)/SiO2 interfaces: Comparison to (111) and (100) silicon orientations

Thoan

Keunen

Afanasʼev

et al. 2011

Journal of Applied Physics

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“…Table I shows the density and energy level of the P b centers at the Si͑100͒-SiO 2 interface obtained from the works of Gerardi 19 and Uren. 22 The results obtained from this work for polysilicon gate MOS capacitors exposed to RTA, and samples measured following RTO, are presented for comparison.…”

Section: Discussion: Origin Of Interface Statesmentioning

confidence: 99%

Si (100)– SiO 2 interface properties following rapid thermal processing

O’Sullivan

Hurley

Leveugle

et al. 2001

Journal of Applied Physics

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Access to the full text of the published version may require a subscription. An experimental examination of the properties of the Si͑100͒-SiO 2 interface measured following rapid thermal processing ͑RTP͒ is presented. The interface properties have been examined using high frequency and quasi-static capacitance-voltage ͑CV͒ analysis of metal-oxide-silicon ͑MOS͒ capacitor structures immediately following either rapid thermal oxidation ͑RTO͒ or rapid thermal annealing ͑RTA͒. The experimental results reveal a characteristic peak in the CV response measured following dry RTO and RTA (TϾ800°C), as the Fermi level at the Si͑100͒-SiO 2 interface approaches the conduction band edge. Analysis of the QSCV responses reveals a high interface state density across the energy gap following dry RTO and RTA processing, with a characteristic peak density in the range 5.5ϫ10 12 to 1.7ϫ10 13 cm Ϫ2 eV Ϫ1 located at approximately 0.85-0.88 eV above the valence band edge. When the background density of states for a hydrogen-passivated interface is subtracted, another peak of lower density (3ϫ10 12 to 7ϫ10 12 cm Ϫ2 eV Ϫ1 ͒ is observed at approximately 0.25-0.33 eV above the valence band edge. The experimental results point to a common interface state defect present after processes involving rapid cooling (10 1 -10 2°C /s) from a temperature of 800°C or above, in a hydrogen free ambient. This work demonstrates that the interface states measured following RTP (TϾ800°C) are the net contribution of the P b0 / P b1 silicon dangling bond defects for the oxidized Si͑100͒ orientation. An important conclusion arising from this work is that the primary effect of an RTA in nitrogen ͑600-1050°C͒ is to cause hydrogen desorption from pre-existing P b0 / P b1 silicon dangling bond defects. The implications of this work to the study of the Si-SiO 2 interface, and the technological implications for silicon based MOS processes, are briefly discussed. The significance of these new results to thin oxide growth and optimization by RTO are also considered. Rights

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“…These defects are electrically active following the dissociation of hydrogen from the dangling bonds. This can be achieved by vacuum annealing (T > 700 • C) [61], a rapid pull from an oxidation furnace [59] or through a process of rapid thermal annealing (RTA) in a N 2 ambient [62], where the cooling from the maximum RTA temperature is too rapid to allow passivation during the cooling process. Analysis of the high-k/Si MOS system by electron spin resonance [66], [67] and C-V analysis [68], [69] indicates that the dominant interface defects are also P b centers, as the interface region between the silicon and the high-k film (either intentionally or via the high-k growth process) is an SiO x layer.…”

Section: A a Brief Consideration Of The D It Energy Distribution At mentioning

confidence: 99%

The Characterization and Passivation of Fixed Oxide Charges and Interface States in the $\hbox{Al}_{2}\hbox{O}_{3}/ \hbox{InGaAs}$ MOS System

Hurley

O’Connor

Djara

et al. 2013

IEEE Trans. Device Mater. Relib.

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In this paper, we present a review of experimental results examining charged defect components in the Al 2 O 3 / In 0.53 Ga 0.47 As metal-oxide-semiconductor (MOS) system. For the analysis of fixed oxide charge and interface state density, an approach is described where the flatband voltage for n-and p-type Al 2 O 3 /In 0.53 Ga 0.47 As MOS structures is used to separate and quantify the contributions of fixed oxide charge and interface state density. Based on an Al 2 O 3 thickness series (10-20 nm) for the n-and p-type In 0.53 Ga 0.47 As layers, the analysis reveals a positive fixed charge density (∼ 9 × 10 18 cm −3 ) distributed throughout the Al 2 O 3 and a negative sheet charge density (−8 × 10 12 cm −2 ) located near the Al 2 O 3 /In 0.53 Ga 0.47 As interface. The interface state density integrated across the energy gap is ∼1 × 10 13 cm −2 and is a donor-type (+/0) defect. The density of the fixed oxide charge components is significantly reduced by forming gas (5% H 2 /95%N 2 ambient at 350 • C for 30 minutes) annealing. The interface state distribution obtained from multifrequency capacitance-voltage and conductance-voltage measurements on either MOS structures or MOSFETs indicates a peak density located around the In 0.53 Ga 0.47 As midgap energy, with a sharp increase in the interface state density toward the valance band and evidence of interface states aligned with the In 0.53 Ga 0.47 As conduction band. The integrated interface state density obtained from multi-frequency capacitance-voltage and conductance-voltage analysis is in good agreement with the approach of comparing the flatband voltages in n-and p-type Al 2 O 3 /In 0.53 Ga 0.47 As MOS structures. Finally, this Manuscript paper reviews recent work based on an optimization of the In 0.53 Ga 0.47 As surface preparation using (NH 4 ) 2 S, combined with minimizing the transfer time to the atomic layer deposition reactor for Al 2 O 3 , which indicates interface state reduction (< 10 12 cm −2 eV −1 ) and genuine surface inversion for both n-and p-type Al 2 O 3 /In 0.53 Ga 0.47 As MOS structures.

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Potential fluctuations due to Pb centres at the interface

Cited by 22 publications

References 10 publications

Interface state energy distribution and Pb defects at Si(110)/SiO2 interfaces: Comparison to (111) and (100) silicon orientations

Interface state energy distribution and Pb defects at Si(110)/SiO2 interfaces: Comparison to (111) and (100) silicon orientations

Si (100)– SiO 2 interface properties following rapid thermal processing

The Characterization and Passivation of Fixed Oxide Charges and Interface States in the $\hbox{Al}_{2}\hbox{O}_{3}/ \hbox{InGaAs}$ MOS System

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