Positive and negative CMOS voltage multiplier for 5-V-only flash memories

Calligaro, Cristiano; Gastaldi, R.; Malcovati, P.; Torelli, G.

doi:10.1109/mwscas.1995.504435

Cited by 6 publications

(7 citation statements)

References 6 publications

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“…8(a), the output voltage is inversely proportional to the area and is not related to the parasitic capacitors expected in Eqn. (2). The interaction between the power efficiency and area in Fig.…”

Section: Circuit Simulation and Optimizationmentioning

confidence: 99%

Negative High Voltage DC-DC Converter Using a New Cross-Coupled Structure

Zhao¹,

Kim²,

Kim³

2020

JICS

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In this paper, a negative high voltage DC-DC converter using a new cross-coupled charge pump structure has been proposed, which can solve the shoot-through current problem of the conventional charge pump by using a four clock phase scheme. Also, by switching the power supply to each stage based on the supply voltage, a variable voltage gain can be obtained. A complete analysis of the interaction between the power efficiency, area, and frequency have been presented. The proposed negative charge pump is designed to deliver 40μA with a widesupply range from 2.5V to 5.5V using 0.18μm high voltage LDMOS technology.

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Section: Circuit Simulation and Optimizationmentioning

confidence: 99%

Negative High Voltage DC-DC Converter Using a New Cross-Coupled Structure

Zhao¹,

Kim²,

Kim³

2020

JICS

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“…In this approach, a high voltage (∼ 6.5V ) is applied to drain, while a high voltage is applied to the gate (∼ 10.5V ) and the source terminal is grounded. For the erasure, a high positive voltage (∼ 10.5V ) is applied to the source while its gate is grounded [75]. Applying a very high voltage to the source for erasure may cause reliability issues because this high voltage will reverse-bias the source-to-bulk PN junction close to the breakdown region.…”

Section: Negative Charge Pumpmentioning

confidence: 99%

“…Applying a very high voltage to the source for erasure may cause reliability issues because this high voltage will reverse-bias the source-to-bulk PN junction close to the breakdown region. Also, the band-to-band tunneling and the high electric field between source and substrate can create hot holes and trap them in the gate oxide leading to degrading cell endurance [75].…”

Section: Negative Charge Pumpmentioning

confidence: 99%

“…For these applications, it is useful to be able to generate all these voltages inside the chip from the power supply of the portable system [76,4]. The outputs of these circuits must be handled with the read voltage to feed the memory Word Line (WL) with the required level under any operating conditions (reading, erasing, programming) [75].…”

Section: Negative Charge Pumpmentioning

confidence: 99%

“…Traditionally, two types of charge pumps (negative and positive) are realized on a chip. However, only one was active at a time due to the timing of the program and erase operations [77,78,75,5].…”

Section: Negative Charge Pumpmentioning

confidence: 99%

See 2 more Smart Citations

Integrated Circuits for Programming Flash Memories in Portable Applications

Navidi¹

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Smart devices such as smart grids, smart home devices, etc. are infrastructure systems that connect the world around us more than before. These devices can communicate with each other and help us manage our environment. This concept is called the Internet of Things (IoT). Not many smart nodes exist that are both low-power and programmable. Floating-gate (FG) transistors could be used to create adaptive sensor nodes by providing programmable bias currents. FG transistors are mostly used in digital applications like Flash memories. However, FG transistors can be used in analog applications, too. Unfortunately, due to the expensive infrastructure required for programming these transistors, they have not been economical to be used in portable applications. In this work, we present low-power approaches to programming FG transistors which make them a good candidate to be employed in future wireless sensor nodes and portable systems. First, we focus on the design of low-power circuits which can be used in programming the FG transistors such as highvoltage charge pumps, low-drop-out regulators, and voltage reference cells. Then, to achieve the goal of reducing the power consumption in programmable sensor nodes and reducing the programming infrastructure, we present a method to program FG transistors using negative voltages. We also present charge-pump structures to generate the necessary negative voltages for programming in this new configuration.

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