Poly‐GeSn Junctionless Thin‐Film Transistors on Insulators Fabricated at Low Temperatures via Pulsed Laser Annealing

Zhang, Lu; Hong, Haiyang; Yu, Chunyu; Li, Cheng; Chen, Songyan; Huang, Wei; Wang, Jianyuan; Wang, Hao

doi:10.1002/pssr.201900420

Cited by 20 publications

(17 citation statements)

References 33 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Moreover, considering the extreme sensitivity of the material with respect to temperature, Figure b reports mobility as a function of the maximum process temperature used; although there is large spread in the mobility data listed, it is hard to extract a definitive mobility trend as a function of process temperature. However, except for the two impressive values of refs and , the graph seems to show a decreasing trend; nevertheless, further investigation needs to be undertaken as a function of Sn content, device configuration, and processing temperature to extract a conclusive trend. Figure c shows the I ON / I OFF ratio data versus mobility for our nanowires benchmarked against planar structures previously reported in the literature.…”

Section: Resultsmentioning

confidence: 89%

See 1 more Smart Citation

Field-Effect Transistor Figures of Merit for Vapor–Liquid–Solid-Grown Ge_1-xSn_x (x = 0.03–0.09) Nanowire Devices

Galluccio

Doherty

Biswas

et al. 2020

ACS Appl. Electron. Mater.

View full text Add to dashboard Cite

Ge1‑x Sn x alloys form a heterogeneous material system with high potential for applications in both optoelectronic and high-speed electronics devices. The attractiveness of Ge1‑x Sn x lies in the ability to tune the semiconductor band gap and electronic properties as a function of Sn concentration. Advances in Ge1‑x Sn x material synthesis have raised expectations recently, but there are considerable problems in terms of device demonstration. Although Ge1‑x Sn x thin films have been previously explored experimentally, in-depth studies of the electrical properties of Ge1‑x Sn x nanostructures are very limited, specifically those on nanowires grown via a bottom-up vapor–liquid–solid (VLS) process using metal catalysts. In this study, a detailed electrical investigation is presented of nominally undoped Ge1‑x Sn x bottom-up-grown nanowire devices with different Sn percentages (3–9 at. %). The entire device fabrication process is performed at relatively low temperatures, the maximum temperature being 440 °C. Device current modulation is performed through backgating from a substrate electrode, achieving impressive on–off current (I ON/I OFF) ratios of up to 104, showing their potential for electronic and sensor-based applications. Contact resistance (R C) extraction is essential for proper VLS-grown nanowire device electrical evaluation. Once the R C contribution is extracted and removed, parameter values such as mobility can change significantly, by up to 70% in this work. When benchmarked against other Ge1‑x Sn x electronic devices, the VLS-grown nanowire devices have potential in applications where a high I ON/I OFF ratio is important and where thermal budget and processing temperatures are required to be kept to minimum.

show abstract

Section: Resultsmentioning

confidence: 89%

“…Table and Figure show the comparison between the most common electrical parameters reported to date, with different device architectures and GeSn channel compositions considering process temperatures below 1000 °C. − …”

Section: Resultsmentioning

confidence: 99%

Field-Effect Transistor Figures of Merit for Vapor–Liquid–Solid-Grown Ge_1-xSn_x (x = 0.03–0.09) Nanowire Devices

Galluccio

Doherty

Biswas

et al. 2020

ACS Appl. Electron. Mater.

View full text Add to dashboard Cite

show abstract

“…Although the device with a GeSn thickness of 9 nm showed the highest mobility, the poor SS (1560 mV/dec) and an I ON /I OFF of only 75 make it unsuitable for device applications. The thin (5 nm) channel thickness exhibited 10 times lower mobility than the 7 nm GeSn device, which is attributed to the lack of carriers and strong interfacial scattering [26,27]. The 7 nm GeSn TFT device showed a large I ON /I OFF , of 8.9 × 10 6 ; a good SS value, of 311 mV/dec; and a high µ FE , of 41.8 cm 2 /V•s, which is much better than those of traditional oxide pTFTs and shows the high potential for future SoP and monolithic brain-mimicking IC applications.…”

Section: Resultsmentioning

confidence: 95%

“…This is the reason why GeSn has been proposed for pMOS or pTFT. However, the reported GeSn pTFTs in the literature suffered from poor I ON /I OFF [26][27][28][29], which is due to the leakage current of the small energy bandgap. Table 2 displays the crucial TFT device parameters of various poly-GeSn TFTs [26][27][28][29].…”

Section: Resultsmentioning

confidence: 99%

“…However, the reported GeSn pTFTs in the literature suffered from poor I ON /I OFF [26][27][28][29], which is due to the leakage current of the small energy bandgap. Table 2 displays the crucial TFT device parameters of various poly-GeSn TFTs [26][27][28][29]. The remarkably high I ON /I OFF and relatively sharp SS are the advantages of this study.…”

Section: Resultsmentioning

confidence: 99%

See 1 more Smart Citation

Remarkably High-Performance Nanosheet GeSn Thin-Film Transistor

et al. 2022

View full text Add to dashboard Cite

High-performance p-type thin-film transistors (pTFTs) are crucial for realizing low-power display-on-panel and monolithic three-dimensional integrated circuits. Unfortunately, it is difficult to achieve a high hole mobility of greater than 10 cm2/V·s, even for SnO TFTs with a unique single-hole band and a small hole effective mass. In this paper, we demonstrate a high-performance GeSn pTFT with a high field-effect hole mobility (μFE), of 41.8 cm2/V·s; a sharp turn-on subthreshold slope (SS), of 311 mV/dec, for low-voltage operation; and a large on-current/off-current (ION/IOFF) value, of 8.9 × 106. This remarkably high ION/IOFF is achieved using an ultra-thin nanosheet GeSn, with a thickness of only 7 nm. Although an even higher hole mobility (103.8 cm2/V·s) was obtained with a thicker GeSn channel, the IOFF increased rapidly and the poor ION/IOFF (75) was unsuitable for transistor applications. The high mobility is due to the small hole effective mass of GeSn, which is supported by first-principles electronic structure calculations.

show abstract

Solid‐Phase Crystallization of GeSn Thin Films on GeO₂‐Coated Glass

Mizoguchi

Ishiyama

Moto

et al. 2021

Physica Rapid Research Ltrs

View full text Add to dashboard Cite

Polycrystalline Ge thin films are promising candidates for next‐generation thin‐film transistors. However, the difficulty in Fermi‐level control due to the high density of defect‐induced acceptors has been one of the main problems for device applications. Herein, GeO2 preparation and Sn addition are combined in the advanced low‐temperature (375 °C) solid‐phase crystallization of Ge layers that have been recently developed. The GeO2 underlayer works effectively at a low Sn composition (< 4%), enlarging the grain size by a magnification of ≈5. An appropriate amount of unsubstituted Sn reduces acceptor defects and achieves a minimum hole concentration of 3 × 1016 cm−3 by combining post‐annealing (500 °C). This hole concentration is the lowest level for undoped polycrystalline Ge‐based thin films, which allows control over their Fermi level widely by impurity doping. Although the lower hole concentration provides a higher energy barrier height of the grain boundary, the hole mobility is maintained at 190 cm2 V−1 s−1 owing to the large grains (15 μm diameter). This achievement paves the way for the implementation of poly‐Ge‐based thin films in various semiconductor devices, including advanced thin‐film transistors.

show abstract

Poly‐GeSn Junctionless Thin‐Film Transistors on Insulators Fabricated at Low Temperatures via Pulsed Laser Annealing

Cited by 20 publications

References 33 publications

Field-Effect Transistor Figures of Merit for Vapor–Liquid–Solid-Grown Ge_1-xSn_x (x = 0.03–0.09) Nanowire Devices

Field-Effect Transistor Figures of Merit for Vapor–Liquid–Solid-Grown Ge_1-xSn_x (x = 0.03–0.09) Nanowire Devices

Remarkably High-Performance Nanosheet GeSn Thin-Film Transistor

Solid‐Phase Crystallization of GeSn Thin Films on GeO₂‐Coated Glass

Contact Info

Product

Resources

About

Poly‐GeSn Junctionless Thin‐Film Transistors on Insulators Fabricated at Low Temperatures via Pulsed Laser Annealing

Cited by 20 publications

References 33 publications

Field-Effect Transistor Figures of Merit for Vapor–Liquid–Solid-Grown Ge1-xSnx (x = 0.03–0.09) Nanowire Devices

Field-Effect Transistor Figures of Merit for Vapor–Liquid–Solid-Grown Ge1-xSnx (x = 0.03–0.09) Nanowire Devices

Remarkably High-Performance Nanosheet GeSn Thin-Film Transistor

Solid‐Phase Crystallization of GeSn Thin Films on GeO2‐Coated Glass

Contact Info

Product

Resources

About

Field-Effect Transistor Figures of Merit for Vapor–Liquid–Solid-Grown Ge_1-xSn_x (x = 0.03–0.09) Nanowire Devices

Field-Effect Transistor Figures of Merit for Vapor–Liquid–Solid-Grown Ge_1-xSn_x (x = 0.03–0.09) Nanowire Devices

Solid‐Phase Crystallization of GeSn Thin Films on GeO₂‐Coated Glass