Placement and routing for a field programmable multi-chip module

Abstract

| Placemen t and routing heuristics for a Field Programmable Multi-Chip Module (FPMCM) are presented. The placement is done in three phases; partitioning, chip assignment and iterative improvement. The routing is done in two phases; global routing followed by detailed routing. Detailed routing involves new channel routing problems denoted by Exact Segmented Channel Routing (ESCR) and K-ESCR. A very fast K-ESCR heuristic is described. Experimental results show that the placement heuristic achieves high gate utilization, and that the K-ESCR heuristic performs surprisingly well over wide range of channel sizes.

Tradeoffs in chip and substrate complexity and cost for field programmable multichip modules

“…Unlike partitions of a microprocessor, partitioning a large FPLD into an MCM can produce several identical chips, easing design and inventory control. 2 Two FPMCM Designs MCM technology has been proposed or used in field programmable systems by several research groups [8,9,10,11,12,131. Still other groups have proposed or developed prototypes of wafer-scale FPLDs[14, 15,161.…”

EMPAR: an interactive synthesis environment for hardware emulations

“…In the past several years, hardware-emulation related topics, including architecture [16, 5,7], partitioning [6], placement/routing [13], pin-assignment [ll], synthesis [14], and applications [4, 91, have become an intensive research area in the CAD community. It has become obvious that a design environment is needed to integrate all of the above techniques into a single hardware emulation system.…”