Piezoelectric Strain Modulation in FETs

Hemert, T. van; Hueting, R.J.E.

doi:10.1109/ted.2013.2274817

Cited by 26 publications

(33 citation statements)

References 34 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Voltage scaling, however, necessitates steep slope devices which in turn require operation beyond Boltzmann statistics. Several steep switching device concepts like tunneling FETs 15 16 , piezoelectric strain modulated Si FinFETs 17 , negative capacitance ferroelectric FETs 18 excitonic FETs 19 and spin-based FETs 20 21 have been proposed. Among these, tunneling FETs are the most matured candidates which have experimentally demonstrated SS less than 60 mV/decade 15 .…”

mentioning

confidence: 99%

Two Dimensional Electrostrictive Field Effect Transistor (2D-EFET): A sub-60mV/decade Steep Slope Device with High ON current

Das

2016

Sci Rep

View full text Add to dashboard Cite

This article proposes a disruptive device concept which meets both low power and high performance criterion for post-CMOS computing and at the same time enables aggressive channel length scaling. This device, hereafter refer to as two-dimensional electrostrictive field effect transistor or 2D-EFET, allows sub-60 mV/decade subthreshold swing and considerably higher ON current compared to any state of the art FETs. Additionally, by the virtue of its ultra-thin body nature and electrostatic integrity, the 2D-EFET enjoys scaling beyond 10 nm technology node. The 2D-EFET works on the principle of voltage induced strain transduction. It uses an electrostrictive material as gate oxide which expands in response to an applied gate bias and thereby transduces an out-of-plane stress on the 2D channel material. This stress reduces the inter-layer distance between the consecutive layers of the semiconducting 2D material and dynamically reduces its bandgap to zero i.e. converts it into a semi-metal. Thus the device operates with a large bandgap in the OFF state and a small or zero bandgap in the ON state. As a consequence of this transduction mechanism, internal voltage amplification takes place which results in sub-60 mV/decade subthreshold swing (SS).

show abstract

mentioning

confidence: 99%

Two Dimensional Electrostrictive Field Effect Transistor (2D-EFET): A sub-60mV/decade Steep Slope Device with High ON current

Das

2016

Sci Rep

View full text Add to dashboard Cite

show abstract

“…More recently, we have proposed the so-called piezoelectric field-effect transistor (

-FET) [ 15 , 16 ] in which an FE layer is implemented (see Figure 5 ). The basic idea is that the strain in the semiconductor body can be tuned by the converse

-effect.…”

Section: The Piezoelectric Field-effect Transistormentioning

confidence: 99%

“…The strain influences the semiconductor transport properties: it reduces the band gap and depending on the device/crystal orientation it also increases the charge carrier mobility. This reduces the

[ 16 ].…”

Section: The Piezoelectric Field-effect Transistormentioning

confidence: 99%

“…Later, various device architectures have been proposed in which a ferroelectric (FE) layer has been embedded in a conventional MOSFET (see Figure 1 ): the negative-capacitance field-effect transistor (NC-FET) [ 13 , 14 ], and the piezoelectric field-effect transistor (

-FET) [ 15 , 16 ]. In particular, the NC-FET is currently a hot topic since, in principle, it only requires a single additional FE layer that is compatible with CMOS technology.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

The Balancing Act in Ferroelectric Transistors: How Hard Can It Be?

Hueting

2018

Micromachines

View full text Add to dashboard Cite

For some years now, the ever continuing dimensional scaling has no longer been considered to be sufficient for the realization of advanced CMOS devices. Alternative approaches, such as employing new materials and introducing new device architectures, appear to be the way to go forward. A currently hot approach is to employ ferroelectric materials for obtaining a positive feedback in the gate control of a switch. This work elaborates on two device architectures based on this approach: the negative-capacitance and the piezoelectric field-effect transistor, i.e., the NC-FET (negative-capacitance field-effect transistor), respectively π-FET. It briefly describes their operation principle and compares those based on earlier reports. For optimal performance, the adopted ferroelectric material in the NC-FET should have a relatively wide polarization-field loop (i.e., “hard” ferroelectric material). Its optimal remnant polarization depends on the NC-FET architecture, although there is some consensus in having a low value for that (e.g., HZO (Hafnium-Zirconate)). π-FET is the piezoelectric coefficient, hence its polarization-field loop should be as high as possible (e.g., PZT (lead-zirconate-titanate)). In summary, literature reports indicate that the NC-FET shows better performance in terms of subthreshold swing and on-current. However, since its operation principle is based on a relatively large change in polarization the maximum speed, unlike in a π-FET, forms a big issue. Therefore, for future low-power CMOS, a hybrid solution is proposed comprising both device architectures on a chip where hard ferroelectric materials with a high piezocoefficient are used.

show abstract

“…But a further lowering will require disruptive transistor technologies, where off-state leakage is not governed by carrier diffusion. Examples are tunnelling transistors [10,11] and the piezo-FET [12].…”

Section: State Of the Art In Microfabricationmentioning

confidence: 99%

State of the art in Microfabrication

Schmitz¹

2015

Proceedings of Technology and Instrumentation in Particle Physics 2014 — PoS(TIPP2014)

View full text Add to dashboard Cite

Piezoelectric Strain Modulation in FETs

Cited by 26 publications

References 34 publications

Two Dimensional Electrostrictive Field Effect Transistor (2D-EFET): A sub-60mV/decade Steep Slope Device with High ON current

Two Dimensional Electrostrictive Field Effect Transistor (2D-EFET): A sub-60mV/decade Steep Slope Device with High ON current

The Balancing Act in Ferroelectric Transistors: How Hard Can It Be?

State of the art in Microfabrication

Contact Info

Product

Resources

About