Phase transition between (2 × 1) and c(8 × 8) reconstructions observed on the Si(001) surface around 600°C

Arapkina, Larisa V.; Yuryev, Vladimir A.; Shevlyuga, V. M.; Чиж, К. В.

doi:10.1134/s0021364010170091

Cited by 16 publications

(23 citation statements)

References 8 publications

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“…The migration of hydrogen atoms from the Si 3 N 4 or SiO 2 layer into the growing silicon film is due to the difference in chemical potentials of hydrogen atoms in the dielectric layer and the silicon film. 600…”

Section: Resultsmentioning

confidence: 99%

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Diffusion of hydrogen atoms in silicon layers deposited from molecular beams on dielectric substrates

Чиж

Arapkina

Stavrovsky

et al. 2019

Materials Science in Semiconductor Processing

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In the paper, the processes occurring during low-temperature growth of non-hydrogenated amorphous Si and polycrystalline Si films on multilayer Si 3 N 4 /SiO 2 /c-Si substrates from molecular beams under conditions of ultrahigh vacuum are studied in detail. Diffusion of hydrogen atoms from a dielectric layer into the growing film is shown to accompany the growth of a silicon film on a Si 3 N 4 layer deposited by CVD or on a SiO 2 layer obtained by thermal oxidation of a silicon wafer. The process of hydrogen migration from the dielectric substrates into the silicon film is studied using FTIR spectroscopy. The reduction of IR absorption at the bands related to the N-H bonds vibrations and the increase of IR absorption at the bands relating to the Si-N bonds vibrations in IR spectra demonstrate that hydrogen atoms leave Si 3 N 4 layer during Si deposition from a molecular beam. The absorption band assigned to the valence vibrations of the Si-H bond at ∼ 2100 cm −1 emerging in IR spectra obtained at samples deposited both on Si 3 N 4 and SiO 2 layers indicates the accumulation of hydrogen atoms in silicon films. The difference in chemical potentials of hydrogen atoms in the dielectric layer and the silicon film explains the transfer of hydrogen atoms from the Si 3 N 4 or SiO 2 layer into the growing silicon film.

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Section: Resultsmentioning

confidence: 99%

“…Before depositing of silicon nitride or silicon, the substrates of all types were cleaned using an identical process that we routinely apply for obtaining clean Si surfaces [24,25,26]. At first, they were washed in the ammonia-peroxide solution and dried in the isopropyl alcohol vapor (for 10 min) and the clean air.…”

Section: Samplesmentioning

confidence: 99%

Diffusion of hydrogen atoms in silicon layers deposited from molecular beams on dielectric substrates

Чиж

Arapkina

Stavrovsky

et al. 2019

Materials Science in Semiconductor Processing

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“…Details of the pre-growth treatments of Si wafers, which included wet chemical etching and oxide removal by short high-temperature annealing ( T ∼ 900 °C), can be found in our previous articles [ 20 – 22 ]. Ge films ( h Ge =7 Å) were deposited at the rate of 0.15 Å/s directly on the clean Si(001) surface at the room temperature.…”

Section: Methodsmentioning

confidence: 99%

Evidence for Kinetic Limitations as a Controlling Factor of Ge Pyramid Formation: a Study of Structural Features of Ge/Si(001) Wetting Layer Formed by Ge Deposition at Room Temperature Followed by Annealing at 600 °C

2015

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The article presents an experimental study of an issue of whether the formation of arrays of Ge quantum dots on the Si(001) surface is an equilibrium process or it is kinetically controlled. We deposited Ge on Si(001) at the room temperature and explored crystallization of the disordered Ge film as a result of annealing at 600 °C. The experiment has demonstrated that the Ge/Si(001) film formed in the conditions of an isolated system consists of the standard patched wetting layer and large droplike clusters of Ge rather than of huts or domes which appear when a film is grown in a flux of Ge atoms arriving on its surface. We conclude that the growth of the pyramids appearing at temperatures greater than 600 °C is controlled by kinetics rather than thermodynamic equilibrium whereas the wetting layer is an equilibrium structure.PACS: Primary 68.37.Ef; 68.55.Ac; 68.65.Hb; 81.07.Ta; 81.16.Dn

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“…Application of solutions based on NH 4 F followed by any low-temperature annealing enables obtaining of clean rough Si(001) surfaces composed by narrow and short monoatomic steps ( Figure 10). The (2 × 1)-reconstructed surface form as a result of annealing at the temperatures higher than 600℃ (Figure 10d,e), 1 × 1 surface was observed after treatments at lower temperatures (Figure 10g Notice that the (2 × 1) RHEED patterns were observed for the hydrogenated surfaces after annealing at 800℃ for 5 minutes and quenching [28] which were used as the reference samples with known surface structure.…”

Section: Cmos Compatibility Of Technological Processes Based On Ge/simentioning

confidence: 98%

Ge quantum dot arrays grown by ultrahigh vacuum molecular-beam epitaxy on the Si(001) surface: nucleation, morphology, and CMOS compatibility

Yuryev

Arapkina

2011

Nanoscale Res Lett

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Issues of morphology, nucleation, and growth of Ge cluster arrays deposited by ultrahigh vacuum molecular beam epitaxy on the Si(001) surface are considered. Difference in nucleation of quantum dots during Ge deposition at low (≲600°C) and high (≳600°C) temperatures is studied by high resolution scanning tunneling microscopy. The atomic models of growth of both species of Ge huts--pyramids and wedges-- are proposed. The growth cycle of Ge QD arrays at low temperatures is explored. A problem of lowering of the array formation temperature is discussed with the focus on CMOS compatibility of the entire process; a special attention is paid upon approaches to reduction of treatment temperature during the Si(001) surface pre-growth cleaning, which is at once a key and the highest-temperature phase of the Ge/Si(001) quantum dot dense array formation process. The temperature of the Si clean surface preparation, the final high-temperature step of which is, as a rule, carried out directly in the MBE chamber just before the structure deposition, determines the compatibility of formation process of Ge-QD-array based devices with the CMOS manufacturing cycle. Silicon surface hydrogenation at the final stage of its wet chemical etching during the preliminary cleaning is proposed as a possible way of efficient reduction of the Si wafer pre-growth annealing temperature.

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Phase transition between (2 × 1) and c(8 × 8) reconstructions observed on the Si(001) surface around 600°C

Cited by 16 publications

References 8 publications

Diffusion of hydrogen atoms in silicon layers deposited from molecular beams on dielectric substrates

Diffusion of hydrogen atoms in silicon layers deposited from molecular beams on dielectric substrates

Evidence for Kinetic Limitations as a Controlling Factor of Ge Pyramid Formation: a Study of Structural Features of Ge/Si(001) Wetting Layer Formed by Ge Deposition at Room Temperature Followed by Annealing at 600 °C

Ge quantum dot arrays grown by ultrahigh vacuum molecular-beam epitaxy on the Si(001) surface: nucleation, morphology, and CMOS compatibility

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