2020
DOI: 10.1088/1748-0221/15/04/c04055
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Performance study of HGCROC-v2: the front-end electronics for the CMS High Granularity Calorimeter

Abstract: The High Granularity Calorimeter (HGCAL), presently being designed by the Compact Muon Solenoid collaboration (CMS) to replace the existing endcap calorimeters for the High Luminosity phase of the LHC, will feature unprecedented transverse and longitudinal readout and triggering segmentation for both electromagnetic and hadronic sections. The requirements for the front-end electronics are extremely challenging, including high dynamic range (0-10 pC), low noise (2000 electrons), highprecision timing information… Show more

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Cited by 17 publications
(16 citation statements)
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“…The frontend electronics system is designed around a set of ASICs. The HGCROC [3] is the frontend readout chip, which receives signals from the Si sensors and digitizes them, providing ADC, TOT (time over threshold), and TOA (time of arrival) information. There are also two frontend concentrator chips: the ECON-T for the trigger path, which concentrates trigger channel data via one of 4 trigger algorithms, and the ECON-D for the data acquisition (DAQ) path, which performs channel alignment and zero suppression after the accept signal is received from the Level-1 trigger.…”
Section: Frontend Architecturementioning
confidence: 99%
“…The frontend electronics system is designed around a set of ASICs. The HGCROC [3] is the frontend readout chip, which receives signals from the Si sensors and digitizes them, providing ADC, TOT (time over threshold), and TOA (time of arrival) information. There are also two frontend concentrator chips: the ECON-T for the trigger path, which concentrates trigger channel data via one of 4 trigger algorithms, and the ECON-D for the data acquisition (DAQ) path, which performs channel alignment and zero suppression after the accept signal is received from the Level-1 trigger.…”
Section: Frontend Architecturementioning
confidence: 99%
“…These SiPMs are most sensitive around wavelengths of 450 nm, thus the wave length shifting fibers have to be chosen accordingly to peak in a similar region. The first signal processing happens after the ECal part of the module within the 5 cm space currently assigned for the FEMC read-out, realized using CMS HGCROC chips mounted on custom PCBs [11], which can simultaneously process 72 channels. The signals are then transmitted via fiber optic cables to the end of the module for further processing.…”
Section: Hadron-end-capmentioning
confidence: 99%
“…3 has 64 detector channels, the number of channels varies from 48 to 96 for the different board sizes. Main component for the read out of the SiPMs is the analogue / digital ASIC HGCROC for up to 72 detector channels [4]. In order to limit the supply currents to the tileboards, two step-down DC-DC converters bPOL12 [5] form the power input to the tileboards with 10V input voltage and the output voltages of 1.5V and 3.3V.…”
Section: Scintillator Tileboardsmentioning
confidence: 99%