Performance of MWIR and SWIR HgCdTe-based focal plane arrays at high operating temperatures

Melkonian, Leon; Bangs, J. W.; Elizondo, Lee; Ramey, Ron; Guerrero, Ernesto Fidel Cantillo

doi:10.1117/12.850849

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“…Arrays with pitches as small as 15 lm are currently in production. 2,3 As the pitch is reduced further, several issues arise making it difficult or impossible to produce high yield indium bump interconnects using the evaporation and liftoff process. Indium pinch-off due to lateral growth of evaporated In on top of the photoresist results in malformed bumps.…”

Section: Introductionmentioning

confidence: 99%

Hot embossing of thick amorphous fluoropolymer for back end processing of infrared arrays

Markunas

Smith

Melngailis

2012

Journal of Vacuum Science &Amp; Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phen

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A process is presented for patterning vias into thick amorphous fluoropolymer layers for a novel In bump fabrication process, achieved using a hot embossing technique. The technique uses a patterned Si stamp that employs a two-step etching process to obtain pillars with a controlled positive sidewall angle. After embossing with the Si stamp, vias are formed in amorphous fluoropolymer layers. A postembossing blanket reactive ion etch step is then used to remove excess fluoropolymer from the bottoms of the vias, exposing a Ni film. Successful electroplating of In bumps into vias initiated at the Ni layer is demonstrated, confirming complete removal of excess fluoropolymer.

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Section: Introductionmentioning

confidence: 99%