2019
DOI: 10.1016/j.ssel.2019.10.001
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Performance enhancement of triple material double gate TFET with heterojunction and heterodielectric

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Cited by 28 publications
(11 citation statements)
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“…[ 68–70 ] In addition, in TFET research, which relies on the intrinsic semiconductor characteristics, it is still difficult to implement superior NDR characteristics because of the limitation in controlling the electron or hole concentration in the doping region. Therefore, many studies have attempted to fabricate advanced devices through structural/operational improvements using multiple gating, [ 71–73 ] dielectric engineering, and [ 74 ] internal polarization. [ 75,76 ] In 2019, Wu et al.…”
Section: Type Of External Forcementioning
confidence: 99%
“…[ 68–70 ] In addition, in TFET research, which relies on the intrinsic semiconductor characteristics, it is still difficult to implement superior NDR characteristics because of the limitation in controlling the electron or hole concentration in the doping region. Therefore, many studies have attempted to fabricate advanced devices through structural/operational improvements using multiple gating, [ 71–73 ] dielectric engineering, and [ 74 ] internal polarization. [ 75,76 ] In 2019, Wu et al.…”
Section: Type Of External Forcementioning
confidence: 99%
“…Besides such scaling restrictions, a low value of ION is a drawback of TFETs due to reduced carrier tunneling [8]. Thus, to acquire a higher ION and steeper SS, different modified structures are utilized via the introduction of heterojunction engineering over the source-channel interface or by using work function engineering [9][10][11]. In order to enhance the TFET performance, both double and multi-gate methods are grown to another level, where instead of independent metals with a single work function, a binary metal alloy ab1 - with linearly graded work functions are considered to be gate electrodes [12].…”
Section: Introductionmentioning
confidence: 99%
“…But models presented in literature are either based on iterative methods or several assumptions. [37][38][39][40][41][42] However, no compact closed form of drain current analytical expression is available in the literature for a single gate hetero dielectric TFET.…”
Section: Introductionmentioning
confidence: 99%
“…An analytical compact model is required for the faster circuit simulation to understand the working principle of the HDG TFET in depth. But models presented in literature are either based on iterative methods or several assumptions 37–42 . However, no compact closed form of drain current analytical expression is available in the literature for a single gate hetero dielectric TFET.…”
Section: Introductionmentioning
confidence: 99%