Performance Comparisons of III–V and Strained-Si in Planar FETs and Nonplanar FinFETs at Ultrashort Gate Length (12 nm)

Park, Seung Hyun; Liu, Yang; Kharche, Neerav; Jelodar, Mehdi Salmani; Klimeck, Gerhard; Lundstrom, Mark; Luisier, Mathieu

doi:10.1109/ted.2012.2198481

Cited by 72 publications

(24 citation statements)

References 36 publications

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“…According to the International Technology Roadmap for Semiconductors (ITRS) prediction, the 3-D topologies are here to drive the commercial industries up to 5-nm technology node [3,4]. The only innovations in lower technology nodes will be the incorporation of new channel materials as SiGe, Ge, GaAs, etc., which are CMOS compatible or in physical architecture like nanowires and nanotubes [5,6]. Nowadays the market is more thoughtful regarding HP consumer applications and will continue for next consequent 10 years.…”

Section: Introductionmentioning

confidence: 99%

Exploration of symmetric high-k spacer (SHS) hybrid FinFET for high performance application

Pradhan

Priyanka

Mallikarjunarao

et al. 2016

Superlattices and Microstructures

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Section: Introductionmentioning

confidence: 99%

Exploration of symmetric high-k spacer (SHS) hybrid FinFET for high performance application

Pradhan

Priyanka

Mallikarjunarao

et al. 2016

Superlattices and Microstructures

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“…Such high velocity mainly stems from the light effective mass (m * ) of the dominant Γ-valley. However a small m * decreases the Density-of-States (DoS) in the channel, possibly inducing a so called "DoS bottleneck" that partly neutralizes the benefits that III-V nMOSFETs can deliver in terms of ballistic ON-current [7], [8], [9], [10], [11], [12]. Simulations including scattering have also shown that the low DoS of III-V, although resulting in lower scattering rates [13], [14], prevents reaching ON-current values significantly larger than in Si MOSFETs at nanoscale lengths [15], [16], [17].…”

Section: Introductionmentioning

confidence: 99%

Quasi-Ballistic $\Gamma $ - and L-Valleys Transport in Ultrathin Body Strained (111) GaAs nMOSFETs

Caruso

Palestri

Lizzit

et al. 2016

IEEE Trans. Electron Devices

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Abstract-We carefully scrutinize the potential of ultra thin body strained (111) GaAs MOSFETs to achieve better performance than other GaAs-based channel FETs at scaled channel length and with relaxed thickness requirements thanks to Lvalleys enhanced Density of States and carrier transport. Calibrated Multi-Subband Monte Carlo simulations including scattering provide the modeling framework necessary for accurate simulations.The results show that L-valley-enhanced transport most likely will not yield the Ion and switching time improvements observed in simple ballistic simulations, even if considering ideal material properties and purely phonon scattering limited transport. In fact, the increased Density of States and inversion charge at the virtual source provided by the L-valleys in the strained material is counterbalanced by an increased phonon scattering rate and reduced carrier velocity.

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“…Performance analysis of single and multigate MOSFETs on high mobility substrates and Si is an important issue. A number of authors have focused on numerical and theoretical studies of such devices, using self-consistent Poisson/Monte Carlo simulations [5,6], comprehensive semiclassical multisubband Monte Carlo simulations [7], self-consistent solutions of Schrödinger/Poisson equations [6,8,9], a quantum-corrected Monte Carlo simulations [10], and an atomistic Schrödinger/Poisson equations in the non-equilibrium Green's function formalism [11].…”

Section: Introductionmentioning

confidence: 99%

A simulation study of short channel effects with a QET model based on Fermi–Dirac statistics and nonparabolicity for high-mobility MOSFETs

2015

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In this paper, the quantum confinement and short channel effects of Si, Ge, and In 0.53 Ga 0.47 As n-MOSFETs are evaluated. Both bulk and double-gate structures are simulated using a quantum energy transport model based on Fermi-Dirac statistics. Nonparabolic band effects are further considered. The QET model allows us to simulate carrier transport including quantum confinement and hot carrier effects. The charge control by the gate is reduced in the Ge and In 0.53 Ga 0.47 As bulk n-MOSFETs due to the low effective mass and high permittivity. This charge control reduction induces the degradation of short channel effects. In double-gate structures, different improvements of drain induced barrier lowering (DIBL) and subthreshold slope (SS) are seen. The double-gate structure is effective in the suppression of DIBL for all channel materials. The SS degradation depends on channel materials even in double-gate structure.

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Performance Comparisons of III–V and Strained-Si in Planar FETs and Nonplanar FinFETs at Ultrashort Gate Length (12 nm)

Cited by 72 publications

References 36 publications

Exploration of symmetric high-k spacer (SHS) hybrid FinFET for high performance application

Exploration of symmetric high-k spacer (SHS) hybrid FinFET for high performance application

Quasi-Ballistic $\Gamma $ - and L-Valleys Transport in Ultrathin Body Strained (111) GaAs nMOSFETs

A simulation study of short channel effects with a QET model based on Fermi–Dirac statistics and nonparabolicity for high-mobility MOSFETs

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