Abstract:Abstract-Memory window (MW) and the retention of singlelayer (SL) and dual-layer (DL) platinum (Pt) nanocrystal (NC) devices are extensively studied before and after program/erase (P/E) cycling. DL devices show better charge storage capability and reliability over the SL devices. Up to 50% improvement in the stored charge is estimated in the DL device over SL when P/E is performed at equal field. Excellent high temperature and postcycling retention capabilities of SL and DL devices are shown. The impact of the… Show more
“…As a catalyst, Pt nanodots have been extensively used in the petroleum reforming and petrochemical industries as well as in fuel cells because of their excellent catalytic activity [1-4]. On the other hand, Pt nanodots have also been investigated for memory devices that utilize discrete metal nanodots as charge storage medium [5,6]. This is attributed to the potential that the nanodot-based memories can lessen the impact of localized oxide defects, lateral coupling of charge storage layers between adjacent devices, and stress-induced leakage current [7].…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, the employment of Pt nanodots can obtain a deep potential well in memory devices to ensure good data retention, together with good compatibility with CMOS processing. However, most researchers used high-temperature rapid thermal annealing (RTA) of ultrathin Pt films to achieve high-density Pt nanodots [5,8,9], which might cause the formation of an additional interfacial layer between the high-permittivity (high- k ) tunnel layer and silicon substrate as well as crystallization of the tunnel layer.…”
Pt nanodots have been grown on Al2O3 film via atomic layer deposition (ALD) using (MeCp)Pt(Me)3 and O2 precursors. Influence of the substrate temperature, pulse time of (MeCp)Pt(Me)3, and deposition cycles on ALD Pt has been studied comprehensively by scanning electron microscopy, transmission electron microscopy, and X-ray photoelectron spectroscopy. Therefore, Pt nanodots with a high density of approximately 2 × 1012 cm-2 have been achieved under optimized conditions: 300°C substrate temperature, 1 s pulse time of (MeCp)Pt(Me)3, and 70 deposition cycles. Further, metal-oxide-semiconductor capacitors with Pt nanodots embedded in ALD Al2O3 dielectric have been fabricated and characterized electrically, indicating noticeable electron trapping capacity, efficient programmable and erasable characteristics, and good charge retention.
“…As a catalyst, Pt nanodots have been extensively used in the petroleum reforming and petrochemical industries as well as in fuel cells because of their excellent catalytic activity [1-4]. On the other hand, Pt nanodots have also been investigated for memory devices that utilize discrete metal nanodots as charge storage medium [5,6]. This is attributed to the potential that the nanodot-based memories can lessen the impact of localized oxide defects, lateral coupling of charge storage layers between adjacent devices, and stress-induced leakage current [7].…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, the employment of Pt nanodots can obtain a deep potential well in memory devices to ensure good data retention, together with good compatibility with CMOS processing. However, most researchers used high-temperature rapid thermal annealing (RTA) of ultrathin Pt films to achieve high-density Pt nanodots [5,8,9], which might cause the formation of an additional interfacial layer between the high-permittivity (high- k ) tunnel layer and silicon substrate as well as crystallization of the tunnel layer.…”
Pt nanodots have been grown on Al2O3 film via atomic layer deposition (ALD) using (MeCp)Pt(Me)3 and O2 precursors. Influence of the substrate temperature, pulse time of (MeCp)Pt(Me)3, and deposition cycles on ALD Pt has been studied comprehensively by scanning electron microscopy, transmission electron microscopy, and X-ray photoelectron spectroscopy. Therefore, Pt nanodots with a high density of approximately 2 × 1012 cm-2 have been achieved under optimized conditions: 300°C substrate temperature, 1 s pulse time of (MeCp)Pt(Me)3, and 70 deposition cycles. Further, metal-oxide-semiconductor capacitors with Pt nanodots embedded in ALD Al2O3 dielectric have been fabricated and characterized electrically, indicating noticeable electron trapping capacity, efficient programmable and erasable characteristics, and good charge retention.
“…1 A novel structure adopting a single layer (SL) or dual layer (DL) metal nanocrystal (MNC) as localized charge storage medium has been proposed as a candidate for sub-22 nm flash memory cell. 2 Besides the possibility of scaling below 22 nm, the discrete individual charge storage nodes (i.e., MNCs) also provide better immunity to defects than conventional floating gate flash memory. 3 In particular, it has been reported that stacks containing DL MNC provide an enhanced memory window over SL MNC and have the potential capability of storing multi-bits per cell for the future NAND flash applications.…”
We present a systematic investigation of the temperature dependent relaxation current behavior for single layer and dual layer Pt metal nanocrystal (MNC)-based Al 2 O 3 /SiO 2 flash memory gate stacks. Stacks containing single layer Pt MNC exhibit a dual-slope behavior in the log-log plots of the relaxation transient, whereas those with dual layer Pt MNC exhibit a single-slope behavior. We propose a physical model embodying two competing relaxation mechanisms to explain the Pt MNC induced relaxation current-thermionic emission and the quantum tunneling. Based on this model, the dual-slope behavior of single layer MNC-based gate stack can be ascribed to the dominance of thermionic emission at the initial part and quantum tunneling at the tail part. In contrast, the single slope behavior of the dual layer metal nanocrystal-based stack arises from the dominance of the quantum tunneling throughout the relaxation. In addition, we verify that stacks containing dual layer MNC show better retention property than their single layer counterparts. Our results demonstrate that relaxation current measurements offer a simple way to assess the charge retention capability for MNC-based gate stacks. V
“…Metallic NDs have received much attention because of their potential application to charge storage devices 24 25 26 27 28 29 30 31 32 33 34 . The charging and discharging characteristics of metallic NDs through an ultrathin oxide layer depend on their electrostatic potential.…”
Spin transistors have attracted tremendous interest as new functional devices. However, few studies have investigated enhancements of the ON/OFF current ratio as a function of the electron spin behavior. Here, we found a significantly high spin-dependent current ratio—more than 102 at 1.5 V—when changing the relative direction of the magnetizations between FePt nanodots (NDs) and the CoPtCr-coated atomic force microscope (AFM) probe at room temperature. This means that ON and OFF states were achieved by switching the magnetization of the FePt NDs, which can be regarded as spin-diodes. The FePt magnetic NDs were fabricated by exposing a bi-layer metal stack to a remote H2 plasma (H2-RP) on ~1.7 nm SiO2/Si(100) substrates. The ultrathin bi-layers with a uniform surface coverage are changed drastically to NDs with an areal density as high as ~5 × 1011 cm−2. The FePt NDs exhibit a large perpendicular anisotropy with an out-of-plane coercivity of ~4.8 kOe, reflecting the magneto-crystalline anisotropy of (001) oriented L10 phase FePt. We also designed and fabricated double-stacked FePt-NDs with low and high coercivities sandwiched between an ultra-thin Si-oxide interlayer, and confirmed a high ON/OFF current ratio when switching the relative magnetization directions of the low and high coercivity FePt NDs.
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