Passivation of III–V surfaces with crystalline oxidation

Abstract

The control of interfacial physicochemical properties associated with device materials to minimize the impact of point defects on device performance has been a dominant theme in the semiconductor industry.The control of the density of such defects for silicon has been well established for metal oxidesemiconductor field-effect device applications through deliberate reactions with chemically congruent species, such as hydrogen. In contrast, the control of interfacial defects for technologically important III-V device materials is still an active area of research. Performance criteria for the III-V devices are demanding in terms of energy efficiency, material consumption, sensitivity, and speed. The surface reactions of III-V crystals, including the oxidation, are typically known to result in performance limitation for devices, causing significant degradation due to high defect-level densities at the surfaces/interfaces, in contrast to high quality bulk crystal regions. Here, we discuss the approach of utilizing atomically thin, ordered oxide interfacial layers of III-V compound semiconductors, since they provide a unique opportunity for metal-oxide semiconductor applications, compared to the more common approach to avoid the surface oxidation. The long-range ordered oxide interfaces have been obtained by

Aluminum Oxide at the Monolayer Limit via Oxidant‐Free Plasma‐Assisted Atomic Layer Deposition on GaN

“…Interestingly, ordered surface oxide monolayers can be formed on III-V semiconductors by chemical etching and subsequent oxide regrowth at elevated temperatures in a vacuum. [6] In this work, we report the formation of an ultimately thin (≈3 Å), yet continuous, aluminum oxide (AlO x ) monolayer on gallium nitride (GaN) using an oxidant-free ALD process (i.e., without the use of gas-phase oxidants). To the best of our knowledge, this is the first experimental report of the formation of a closed single monolayer of AlO x on a non-metal surface.…”

“…Interestingly, ordered surface oxide monolayers can be formed on III–V semiconductors by chemical etching and subsequent oxide regrowth at elevated temperatures in a vacuum. [ 6 ]…”

Observation of polarity-switchable photoconductivity in III-nitride/MoSx core-shell nanowires

“…For instance, on one hand, such vertical and high-aspect-ratio geometry (1) enables core-shell device architecture in the radial direction which facilitates efficient light absorption and photo-generated charge-carrier extraction for high-efficient photovoltaic or photodetection applications 17,18 , and (2) provides high density of surface sites for artificial photosynthesis or photoelectrochemical photodetection [19][20][21][22] . On the other hand, ultrahigh surface areas naturally induce a high density of surface states 23,24 , which could act as charge trapping centers and harmful to the performance of nanoscale devices. Thus, effective surface passivation approaches are then required to remove or suppress such surface states to boost nanowire device performance 25 .…”

Atomic layer deposited tantalum silicate on crystallographically-oriented epitaxial germanium: interface chemistry and band alignment

“…These coupled effects must be investigated in order to fully-utilize Ge-based technologies going forward. 2,3 Whereas much recent work 4–30 has focused on the HfO 2 /Al 2 O 3 composite/bi-layer high- κ dielectric combined with an interfacial passivation layer (IPL), typically based on GeO 2 , it remains difficult to achieve sub-nm EOT. Thus, new passivation schemes have been proposed to realize highly uniform, compositionally abrupt, temperature-stable, and highly-scaled high- κ dielectric/Ge MOS interfaces.…”

“…If so, whereas a primarily SiO x -based interlayer would increase the thermodynamic stability of the oxide/semiconductor heterointerface, one might expect that Ge-and Ta-suboxide incorporation would reduce interlayer robustness, even if it might (temporarily) passivate Ge dangling bonds at the Ge surface. 29,30…”