Parallel Transistor-Level Circuit Simulation

A Hybrid Approach for Parallel Transistor-Level Full-Chip Circuit Simulation

“…With the transition to manycore processors, parallel transistor-level simulation has received more interest from the electronic design automation community. Our contributions in this paper are: a scalable and robust transistor-level circuit simulation approach for large and challenging problems that uses a hybrid version of the BTF-based preconditioner [10] or a multithreaded Schur complement computation within a hybrid (direct+iterative) solver [9], integration of these linear solvers to a distributed memory parallel circuit simulator, Xyce [5], and a thorough comparison with other serial, multithreaded and distributed solvers for the full simulation. Our hybrid solvers can achieve a parallel speedup of up to 27x when compared with fastest third party solver.…”

Approximation algorithms in combinatorial scientific computing

“…The BTF can be used to reduce the work in solving sparse linear systems of equations by a factorization-based algorithm, since only the diagonal blocks in the BTF need to be factored. The BTF has been used to solve Kirchoff's equations in circuit design within the Xyce circuit simulation code (Keiter et al 2011), and it is also used to solve nonlinear systems of equations in systems modelling software such as Modelica (Fritzson 2014). The strong Hall matrices in the BTF could be used to correctly predict the non-zero structures of orthogonal-triangular (QR) factors of sparse matrices (Coleman et al 1986, Pothen 1993.…”

“…The BTF has been used to solve Kirchoff’s equations in circuit design within the Xyce circuit simulation code (Keiter et al. 2011), and it is also used to solve nonlinear systems of equations in systems modelling software such as Modelica (Fritzson 2014). The strong Hall matrices in the BTF could be used to correctly predict the non-zero structures of orthogonal-triangular ( ) factors of sparse matrices (Coleman et al.…”

Xyce™ Parallel Electronic Simulator Users' Guide, Version 6.5.

“…Fortunately, Xyce [38] provides a workaround that allows power node parasitics to be included in large circuits without breaking singleton removal. The workaround requires the use of a two-level Newton solve, in which the problem is divided into two very separate pieces, each for the most part treated as an entirely separate circuit with minimal coupling terms linking the pieces together.…”

“…Although many of the issues pertinent to running in parallel are still being researched, Xyce is mature enough that some general principles have emerged for efficiently running problems in a parallel environment. In addition to the information in this chapter, reference [38] provides supplemental information about Xyce parallel performance.…”