Parallel Operation of Self‐Limited Analog Programming for Fast Array‐Level Weight Programming and Update

Abstract

Memristive neural networks perform vector matrix multiplication efficiently, which is used for the accelerator of neuromorphic computing. To train the memristor cells in a memristive neural network, the analog conductance state of the memristor should be programmed in parallel; otherwise, the resulting long training time can limit the size of the neural network. Herein, a novel parallel programming method using the self‐limited analog switching behavior of the memristor is proposed. A Pt/Ti:NbOx/NbOx/TiN charge trap memristor device for the programming demonstration is utilized, and a convolutional neural network is emulated to train the MNIST dataset, based on the device characteristics. In the simulation, the proposed programming method is able to reduce programming time to as low as 1/130, compared with the sequential programming method. The simulation suggests that the programming time required by the proposed method is not affected by array size, which makes it very promising in a high‐density neural network.

Multimode Synaptic Operation of a HfAlOx-Based Memristor as a Metaplastic Device for Neuromorphic Applications

“…Then, we simulated the network performance using the damping mode data for adaptive learning and compared it with normal learning using the S-mode P/D data. The detailed neural network simulation procedures can be found in Figure S4 in the SI and elsewhere. − Interestingly, despite the conductance range decreasing, the network adapted to the available conductance range by itself and training was successful in the damping mode. More information on the influence of the conductance range change during training can be found in Figure S5 in the SI.…”

Evolutionary Learning of Binary Neural Network Using a TaOxMemristor via Stochastic Stateful Logic

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