p-Type SiGe transistors with low gate leakage using SiN gate dielectric

Lu, Wu; Wang, X.W.; Hammond, R.; Kuliev, A.; Koester, Steven J.; Chu, J. O.; Ismail, K.; Ma, T.P.; Adesida, I.

doi:10.1109/55.791927

Cited by 18 publications

(12 citation statements)

References 16 publications

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“…2 also shows the results of Si/Si 0.55 Ge 0.45 quantum wells grown by MBE at Daimler Chrysler [13]. Insulating-gate SiGe p-MODFETs using jet-vapor-deposited SiN x gates have also been reported by Lu et al [17]. The improvement in the mobility vs. density characteristics with higher Ge concentration is consistent with the analysis of Sugii et al [14].…”

Section: Electron Mobilitysupporting

confidence: 84%

High-Performance SiGe MODFET Technology

et al. 2004

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An overview of SiGe modulation-doped field-effect transistor (MODFET) technology is provided. The layer structures and mobility enhancements for both p-and n-channel modulation-doped quantum wells are described and compared to mobilities in Si/SiO 2 inversion layers. Next, previous results on high-performance n-and p-MODFETs fabricated at IBM and elsewhere are reviewed, followed by recent results on laterally-scaled Si/SiGe n-MODFETs with gate lengths as small as 70 nm. We conclude with a discussion of the materials issues for the future vertical and lateral scaling of SiGe MODFETs.

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Section: Electron Mobilitysupporting

confidence: 84%

High-Performance SiGe MODFET Technology

et al. 2004

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“…SiGe metal-oxide-semiconductor MODFETs ͑MOS-MODFETs͒ with a gate dielectric layer between gate and channel exhibited extremely low gate leakage current. 2 But the devices exhibited high pinch-off voltages and threshold voltages as the gate length decreased down to 100 nm. 3 A self-aligned process, which effectively reduces the parasitic resistances, can improve device performances dramatically.…”

Section: Introductionmentioning

confidence: 99%

Comparative study of self-aligned and nonself-aligned SiGe p-metal–oxide–semiconductor modulation-doped field effect transistors with nanometer gate lengths

Koester

Wang

et al. 2000

Journal of Vacuum Science &Amp; Technology B: Microelectronics and Nanometer Structures Processing, Measurement, and Phenomena

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Articles you may be interested inPattern dependency in selective epitaxy of B-doped SiGe layers for advanced metal oxide semiconductor field effect transistors Scaling the SiGe channel p metal-oxide-semiconductor field effect transistor: The case for p+ SiGe gates A low temperature gate oxide process for n -channel SiGe modulation doped field effect transistors A self-aligned process used to fabricate p-type SiGe metal-oxide-semiconductor modulation-doped field effect transistors ͑MOS-MODFET͒ is described. Self-and nonself-aligned p-type Si 0.2 Ge 0.8 /Si 0.7 Ge 0.3 MOS-MODFETs with gate-lengths from 1 m down to 100 nm were fabricated. The dc and microwave characteristics of these devices are presented. In comparison with nonself-aligned devices, self-aligned devices exhibited higher extrinsic transconductances, lower threshold voltages, higher unity current gain cutoff frequencies f T , and maximum oscillation frequencies f MAX . Self-aligned MOS-MODFETs with a gate length of 100 nm exhibited an extrinsic transconductance of 320 mS/mm, an f T of 64 GHz, and an f MAX of 77 GHz. To our knowledge, these are the highest data ever reported for any MOS-type p-FETs with a SiGe channel. All these excellent performances were measured at very low drain and gate biases.

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“…3 However, at the present time, the main point of concern is the potential application of SiN x :H to the gate structure of complementary metaloxide-semiconductor transistors. 4,5 This application is motivated by the continuous downscaling of the channel length below 180 nm, which is pushing the SiO 2 gate dielectric thickness below 2.0 nm. In this ultrathin range, boron transport from the p ϩ poly-Si gate electrode to the channel region occurs during the high temperature anneals that are required to activate the B dopant atoms.…”

Section: Introductionmentioning

confidence: 99%

Temperature effects on the electrical properties and structure of interfacial and bulk defects in Al/SiNx:H/Si devices

Martínez

Andrés

Prado

et al. 2001

Journal of Applied Physics

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Bulk properties of SiN x :H thin film dielectrics and interface characteristics of SiN x :H/Si devices are studied by a combination of electrical measurements ͑capacitance-voltage and current-voltage characteristics͒ and defect spectroscopy ͑electron spin resonance͒. The SiN x :H films were deposited by an electron cyclotron resonance plasma method and subjected to rapid thermal annealing postdeposition treatments at temperatures between 300 and 1050°C for 30 s. It is found that the response of the dielectric to the thermal treatments is strongly affected by its nitrogen to silicon ratio (N/Siϭx) being above or below the percolation threshold of the Si-Si bonds in the SiN x :H lattice, and by the amount and distribution of the hydrogen content. The density of Si dangling bond defects decreases at moderate annealing temperatures ͑below 600°C͒ in one order of magnitude for the compositions above the percolation threshold ͑nitrogen rich, xϭ1.55, and near stoichiometric, x ϭ1.43͒. For the nitrogen rich films, a good correlation exists between the Si dangling bond density and the interface trap density, obtained from the capacitance measurements. This suggests that the observed behavior is mainly determined by the removal of states from the band tails associated to Si-Si weak bonds, because of the thermal relaxation of the bonding strain. At higher annealing temperatures the deterioration of the electrical properties and the increase of the Si dangling bonds seem to be associated with a release of trapped hydrogen from microvoids of the structure. For the silicon rich samples rigidity percolates in the network resulting in a rigid and strained structure for which the degradation phenomena starts at lower temperatures than for the other two types of samples.

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p-Type SiGe transistors with low gate leakage using SiN gate dielectric

Cited by 18 publications

References 16 publications

High-Performance SiGe MODFET Technology

High-Performance SiGe MODFET Technology

Comparative study of self-aligned and nonself-aligned SiGe p-metal–oxide–semiconductor modulation-doped field effect transistors with nanometer gate lengths

Temperature effects on the electrical properties and structure of interfacial and bulk defects in Al/SiNx:H/Si devices

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