Overview of complementary GaAs technology for high-speed VLSI circuits

Abstract

A self-aligned complementary GaAs (CGaAs TM) technology developed at Motorola for low-power, portable, digital and mixed-mode circuits is being extended to address highspeed VLSI circuit applications. The process supports full complementary, unipolar (pseudo-DCFL), source-coupled, and dynamic (domino) logic families. Though this technology is not yet mature, it is years ahead of CMOS in terms of fast gate delays at low power supply voltages. Complementary circuits operating at 0.9V have demonstrated power-delay products of 0.01µW/MHz/gate. Propagation delays of unipolar circuits are as low as 25 ps. Logic families can be mixed on a chip to trade power for delay. CGaAs is being evaluated for VLSI applications through the design of a PowerPC TM-architecture microprocessor. This paper touches on the major aspects of the project, process technology, circuit design, packaging, architecture, CAD tools and software, with an emphasis on application of the CGaAs technology.

Demonstration of high-mobility electron and hole transport in a single InGaSb well for complementary circuits

“…In 1989, Kiehl and colleagues at IBM designed and fabricated a single heterostructure that included both n-and p-channel GaAs layers with AlGaAs barriers, and demonstrated p-channel FETs operating at 77 K [1]. A decade later, a group at Motorola formed adjacent n-and p-channel GaAs FETs using ion implantation and demonstrated digital circuits [2]. More recently, Leuther et al demonstrated room-temperature ring oscillators using complementary n-and p-FETs with separate InGaAs channels and Al(Ga)As barriers grown in a single heterostructure [3].…”

Radiation Effects in Iii-v Semiconductor Electronics

“…One GaAs logic family, complementary heterostructure field effect transistor technology (C-HIGFET or C-HFET), 78 appears promising for space-based applications. C-HFET technology exhibits SEU cross sections that are one to two orders of magnitude lower than either Si emitter coupled logic or GaAs MESFET alternatives, 79 while maintaining the high speed and total ionizing dose immunity that are characteristic of GaAs.…”

CGaAs PowerPC FXU

“…CGaAs has some design challenges, including higher gate and source-drain leakage currents than comparable CMOS processes [3]. As in CMOS, many logic styles can be realized in CGaAs, including Complementary, Source-Coupled FET Logic (SCFL), Domino, Dual-Rail Domino, Differential Cascode Voltage Switch Logic (DCVSL), and Pseudo-Direct Coupled FET Logic (P-DCFL) [3].…”

“…As in CMOS, many logic styles can be realized in CGaAs, including Complementary, Source-Coupled FET Logic (SCFL), Domino, Dual-Rail Domino, Differential Cascode Voltage Switch Logic (DCVSL), and Pseudo-Direct Coupled FET Logic (P-DCFL) [3]. We evaluated Domino logic through the design of a PowerPC ALU [1], and DCVSL through the design of a multiplyaccumulate unit [7].…”