Overcoming dicing challenges for low-K copper wafers using nickel-palladium-gold bond pads for automotive application

Abstract

New automotive mission profiles include more than 3500 total hours at 150ºC. To satisfy new automotive requirements, plastic packages must meet AEC Grade 0 or higher. One key limitation of the conventional plastic package is the use of gold bond wire on aluminum bond pad. Au-Al intermetallic degradation due to intermetallic transformation in high temperature storage condition remains the main reliability concern. Pad re-metallization using nickel/palladium, nickel/gold or nickel/palladium/gold over aluminum bond pad or copper bond pad offers a noble and reliable metal interconnect. This study focused on the development of dicing process for low-K-copper wafers having aluminum pad re-metallized with electroless nickel / electroless palladium / immersion gold Over Pad Metallization (OPM). Development wafers were pizza mask wafers on which multiple die designs and scribe grid production control (SGPC) modules were designed. SGPC modules are designed with aluminum probe pads that are used to monitor waferlevel process control. All aluminum features on the wafer were plated with nickel/palladium/gold OPM. With nickel about four times as hard as aluminum, OPM plated SGPC's were much more difficult to dice than conventional SGPC's with aluminum pads. Cracking on silicon sidewall with crack propagating towards the die was found to cause back-end-of-line (BEOL) delamination and device failure. Surface roughness and hardness measurements were taken on OPM variations. Extensive mechanical dicing studies were conducted to modulate the failures and resolve the dicing challenge. Laser grooving followed by mechanical dicing of OPM wafers was also performed.Packages underwent extensive reliability stress conditions. The associated process improvements described in this paper supported a successful integration of a 55nm die technology in Low Profile Quad Flat Package with Exposed Pad (LQFP-EP) meeting and exceeding AEC grade 0 requirements.

Review—Characterization of Metal-Contamination Effects in Silicon

“…Palladium.-Palladium is known to be a very fast diffuser in silicon 1 and for this reason it is prone to surface segregation and haze formation at the silicon surface. Palladium was recently proposed 8,9 as a component of the final metallization, so palladium could be present in fabrication lines and contamination by palladium might be possible. Therefore, it is important to be able to reveal palladium contamination by the techniques commonly used to monitor metal contamination, such as the measurements of recombination lifetime.…”

“…2,3 In addition to the most common and most studied contaminants (e.g. iron and copper, [4][5][6][7] ) new elements were introduced a few years ago into the fabrication process, for instance palladium to improve the wire bonding reliability, 8,9 or tellurium for phase change memory devices. 10,11 The detrimental impact of some slow diffuser contaminants (molybdenum and tungsten) was also pointed out.…”

Detection and Prevention of Palladium Contamination in Silicon Devices

“…Unintentional palladium contamination was considered an unlikely event, because palladium is not a common element. However, palladium was recently proposed [2][3][4] as a component of the final metallization, so palladium could be present in fabrication lines and contamination by palladium might be possible. It is therefore important to be able to reveal palladium contamination by the techniques commonly used to monitor metal contamination, such as the measurements of recombination lifetime.…”