2012 IEEE 62nd Electronic Components and Technology Conference 2012
DOI: 10.1109/ectc.2012.6248823
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Optimizing the timing center for high-speed parallel buses

Dan Oh
1
,
Arun Vaidyanath
2
,
Chris Madden
3
et al.
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Cited by 4 publications
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Adaptive Low-Power Synchronization Technique for Multiple Source-Synchronous Clocks in High-Speed Communication Systems

Jaiswal
1
,
Fang
2
,
Gregorius
3
2013
2013 Euromicro Conference on Digital System Design
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Adaptive Low-Power Synchronization Technique for Multiple Source-Synchronous Clocks in High-Speed Communication Systems

Jaiswal
1
,
Fang
2
,
Gregorius
3
2013
2013 Euromicro Conference on Digital System Design
0
0
0
0
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High-speed packages with imperfect power and ground planes

Liu1,
Frye2,
Hlaing
3
et al. 2013
2013 IEEE 63rd Electronic Components and Technology Conference
2
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System level jitter characterization of high speed I/O systems

Oh
1
2012
2012 IEEE International Symposium on Electromagnetic Compatibility
14
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2
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