Optimization of Monolithic 3D TSV Transformers for High-Voltage Digital Isolators

Peng, Lulu; Wu, Renbiao; Fang, Xiangming; Toyoda, Yoshiaki; Akahane, Masashi; Yamaji, Masaharu; Sumida, Hitoshi; Sin, J.K.O.

doi:10.1149/2.0171410jss

Cited by 4 publications

(3 citation statements)

References 15 publications

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“…Top-down electroplating is the most developed technique for TSV fabrication. It is most suited for fabricating 2D in-substrate inductors [51][52][53][54][55][56] . To realize TSVs, extra steps of substrate back-lapping and planarization are needed.…”

Section: D Surface Micromachiningmentioning

confidence: 99%

MEMS inductor fabrication and emerging applications in power electronics and neurotechnologies

et al. 2021

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MEMS inductors are used in a wide range of applications in micro- and nanotechnology, including RF MEMS, sensors, power electronics, and Bio-MEMS. Fabrication technologies set the boundary conditions for inductor design and their electrical and mechanical performance. This review provides a comprehensive overview of state-of-the-art MEMS technologies for inductor fabrication, presents recent advances in 3D additive fabrication technologies, and discusses the challenges and opportunities of MEMS inductors for two emerging applications, namely, integrated power electronics and neurotechnologies. Among the four top-down MEMS fabrication approaches, 3D surface micromachining and through-substrate-via (TSV) fabrication technology have been intensively studied to fabricate 3D inductors such as solenoid and toroid in-substrate TSV inductors. While 3D inductors are preferred for their high-quality factor, high power density, and low parasitic capacitance, in-substrate TSV inductors offer an additional unique advantage for 3D system integration and efficient thermal dissipation. These features make in-substrate TSV inductors promising to achieve the ultimate goal of monolithically integrated power converters. From another perspective, 3D bottom-up additive techniques such as ice lithography have great potential for fabricating inductors with geometries and specifications that are very challenging to achieve with established MEMS technologies. Finally, we discuss inspiring and emerging research opportunities for MEMS inductors.

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Section: D Surface Micromachiningmentioning

confidence: 99%

MEMS inductor fabrication and emerging applications in power electronics and neurotechnologies

et al. 2021

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“…[1][2][3][4][5][6] Among all of the filling materials, electroplated copper has been widely used for its well-known benefits such as high conductivity, low deposition temperature, and compatibility with backend of line (BEOL) processing. [7][8][9][10] Despite all these advantages, there is a great challenge concerned with the thermo-mechanical reliability of Cu-filled TSV. 11,12 Copper protrusion is one of these major reliability issues, caused by the mismatch of coefficient of thermal expansion (CTE) between copper film and silicon substrate.…”

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confidence: 99%

A View on Annealing Behavior of Cu-Filled Through-Silicon Vias (TSV)

Huang

Deng

et al. 2016

ECS J. Solid State Sci. Technol.

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In this article, based on analyzing the effect of self-annealing of copper film both empirically and numerically, a new hypothesis has been proposed to better explain the mechanism of copper protrusion evolution with annealing temperature. Electroplated copper in TSV goes through an intense self-annealing process after deposition at room temperature. The effect of self-annealing, which has been all ignored to date, is critical to the annealing behavior of Cu-filled TSV. During self-annealing, a tensile stress field is generated in TSV due to the occurrence of the initial copper protrusion, and this tensile stress can strongly suppress the copper protrusion during annealing treatment. Atomic Force Microscope (AFM) has been used for the measurements of copper protrusion. A finite element model based on the hot deformation and self-annealing of copper film has been proposed to confirm the hypothesis.

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“…1,2 Since the electroplated copper has been introduced to TSV process of IC chips industry, copper is the most common material used in via filling. [3][4][5] In recent years, many articles have reported the successful void free copper filling of TSVs. 6,7 In addition, the annealing process to reduce the stress of the electroplated copper is essential for device reliability.…”

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The Influence of Annealing on Characteristics of Copper in TSV

Feng

Hang

2015

ECS J. Solid State Sci. Technol.

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In this work, the through silicon via (TSVs) with 100 μm × 13 μm depth-to-width ratio after 300°C and 400°C annealing treatment were characterized respectively by electron backscattered diffraction (EBSD). Finite element modeling was used to demonstrate the Von Mises mechanical stress distribution of copper in TSV caused by different thermal expansion coefficient of copper and silicon at different temperature. According to the modeling results, the compressive yield strength of copper in our experiment is about 1 GPa. The Schmid factors results analyzed from EBSD data show the Schmid factors of copper grains in TSV are almost all larger than 0.3 and soft orientation both before and after annealing treatment. According to Schimd law, the plastic deformation occurs in the grains that have the highest Schmid factors. Schmid factor distribution in the range of 0.45–0.5 reduces in copper after 400°C annealing treatment. The textures of the as deposited copper are eliminated by the migration of 38.9°/110 twist boundaries mainly composed by Σ9 in both annealing treatments. Annealing at 400°C makes the deposited copper contains more 60°/111 coherent twin Σ3 boundaries that have lower energy than that of the copper annealed at 300°C.

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Optimization of Monolithic 3D TSV Transformers for High-Voltage Digital Isolators

Cited by 4 publications

References 15 publications

MEMS inductor fabrication and emerging applications in power electronics and neurotechnologies

MEMS inductor fabrication and emerging applications in power electronics and neurotechnologies

A View on Annealing Behavior of Cu-Filled Through-Silicon Vias (TSV)

The Influence of Annealing on Characteristics of Copper in TSV

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