Optimization of BLAS on the Cell Processor

Abstract

The unique architecture of the heterogeneous multi-core Cell processor offers great potential for high performance computing. It offers features such as high memory bandwidth using DMA, user managed local stores and SIMD architecture. In this paper, we present strategies for leveraging these features to develop a high performance BLAS library. We propose techniques to partition and distribute data across SPEs for handling DMA efficiently. We show that suitable pre-processing of data leads to significant performance improvements, particularly when data is unaligned. In addition, we use a combination of two kernels -a specialized high performance kernel for the more frequently occurring cases and a generic kernel for handling boundary cases -to obtain better performance. Using these techniques for double precision, we obtain up to 70-80% of peak performance for different memory bandwidth bound BLAS level 1 and 2 routines and up to 80-90% for computation bound BLAS level 3 routines.

Matrix Inversion on the Cell/B.E. Processor

“…Notice that, in the reality, many other architectural details affect the optimal block size, but the size of 64 × 64 is usually selected as the optimal block size for porting the dense linear algebra problems to Cell/B.E. processor [9], [22].…”

Accelerating the Execution of Matrix Languages on the Cell Broadband Engine Architecture

“…It should be noted that the default Octave installation utilises hardware-specific BLAS libraries which are provided with the IBM Cell SDK. These libraries are highly optimised for the Cell architecture [46] and can utilise both Cell processors available in the QS22 (a total of 16 SPEs).…”