Model-driven adaptation of double-precision matrix multiplication to the Cell processor architecture

Wyrzykowski, Roman; Rojek, Krzysztof; Szustak, Łukasz

doi:10.1016/j.parco.2011.08.006

Cited by 12 publications

(6 citation statements)

References 21 publications

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“…The cost of data movement has turned into the dominant factor in HPC systems (Malik et al, 2016; Rico-Gallego et al, 2017). To reduce this cost, applications have to be redesigned and tuned for data movements both in the memory hierarchy and between processing units (Hager and Wellein, 2011; Wyrzykowski et al, 2012a).…”

Section: Related Workmentioning

confidence: 99%

Performance portable parallel programming of heterogeneous stencils across shared-memory platforms with modern Intel processors

Szustak

Bratek

2019

The International Journal of High Performance Computing Applica

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In this work, we take up the challenge of performance portable programming of heterogeneous stencil computations across a wide range of modern shared-memory systems. An important example of such computations is the Multidimensional Positive Definite Advection Transport Algorithm (MPDATA), the second major part of the dynamic core of the EULAG geophysical model. For this aim, we develop a set of parametric optimization techniques and four-step procedure for customization of the MPDATA code. Among these techniques are: islands-of-cores strategy, (3+1)D decomposition, exploiting data parallelism and simultaneous multithreading, data flow synchronization, and vectorization. The proposed adaptation methodology helps us to develop the automatic transformation of the MPDATA code to achieve high sustained scalable performance for all tested ccNUMA platforms with Intel processors of last generations. This means that for a given platform, the sustained performance of the new code is kept at a similar level, independently of the problem size. The highest performance utilization rate of about 41–46% of the theoretical peak, measured for all benchmarks, is provided for any of the two-socket servers based on Skylake-SP (SKL-SP), Broadwell, and Haswell CPU architectures. At the same time, the four-socket server with SKL-SP processors achieves the highest sustained performance of around 1.0–1.1 Tflop/s that corresponds to about 33% of the peak.

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Section: Related Workmentioning

confidence: 99%

Performance portable parallel programming of heterogeneous stencils across shared-memory platforms with modern Intel processors

Szustak

Bratek

2019

The International Journal of High Performance Computing Applica

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“…To overlap writing data with computations, it is important to use the multiple buffering technique (Wyrzykowski et al, 2012). In the proposed approach, it is enough to apply two buffers on the CPU side that are used alternatively for parallel computations and writing data.…”

Section: Partitioning Cpu Threads Between Work Teamsmentioning

confidence: 99%

Porting and optimization of solidification application for CPU–MIC hybrid platforms

Szustak

Halbiniak

Kuczynski

et al. 2016

The International Journal of High Performance Computing Applica

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Modern heterogeneous computing platforms have become powerful HPC solutions, which could be applied to a wide range of real-life applications. In particular, the hybrid platforms equipped with Intel Xeon Phi coprocessors offer the advantages of massively parallel computing, while supporting practically the same parallel programming model as conventional homogeneous solutions. However, there is still an open issue as to how scientific applications can efficiently utilize hybrid platforms with Intel MIC coprocessors. In this article, we propose an approach for porting a real-life scientific application to such hybrid platforms, assuming no significant modifications of the application code. It allows us to take advantage of all the computing components, including two CPUs and two coprocessors, for the parallel execution of computational workloads. In this study, we focus on the parallel implementation of a numerical model of the dendritic solidification process in isothermal conditions. We develop a sequence of steps that are necessary for the porting and optimization of the solidification application to hybrid platforms with Intel coprocessors. The main challenges include not only overlapping data movements with computations, but also ensuring adequate utilization of cores/threads and vector units of processors, as well as coprocessors. To reach this aim, we propose an efficient and flexible method for the workload distribution between heterogeneous computing components. For implementing the potential benefits of the proposed approach, we choose a heterogeneous programming model based on a combination of the offload mode for Intel MIC and OpenMP programming standard. The developed approach allows us to execute the whole application up to 9.33 3 faster than the original parallel version that uses two CPUs. Furthermore, the CPU-MIC hybrid platforms enable achieving the speedup of about 1.9 3 that of the CPU platform with 24 cores based on the Ivy Bridge architecture, and about 1.5 3 that of the Haswell-based CPU platform with 36 cores.

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“…Works that use model‐based autotuning but do not regard data influences for the choice of the best parameter set have not been listed in the table. These works include , which restrict the code generation of the ATLAS library to the most promising candidate implementations, , which optimises a hierarchical matrix‐matrix multiplication algorithm for the Cell processor, or , which presents a method for automatically setting up models and finding the most relevant parameters using regression trees.…”

Section: Existing Work Applying Model‐based Autotuningmentioning

confidence: 99%

Data‐aware tuning of scientific applications with model‐based autotuning

Lang

2016

Concurrency and Computation

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Summary Autotuning is a widely accepted method for adapting the execution of scientific applications to the underlying hardware. One method for speeding up the search for the optimal candidate implementation in autotuning, which often is very time‐consuming, is the performance prediction using an analytical model. Using such a model‐based autotuning method, autotuning may be performed at runtime, which enables the application to consider data characteristics for the tuning decision. The article gives an overview on existing works, which apply model‐based autotuning for data‐aware tuning decisions in scientific computing. It shows that model‐based autotuning is a feasible method for increasing the performance of scientific applications by considering influences from the input data, where ‘performance’ may be execution time or energy, among others. It furthermore presents a systematisation of model‐based autotuning: it proposes a distinction of algorithm parameters, machine‐specific parameters and data‐specific parameters. The article gives suggestions on how to set up an application‐specific analytical model, presents an example for that and discusses the limits of model‐based autotuning. Copyright © 2016 John Wiley & Sons, Ltd.

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Model-driven adaptation of double-precision matrix multiplication to the Cell processor architecture

Cited by 12 publications

References 21 publications

Performance portable parallel programming of heterogeneous stencils across shared-memory platforms with modern Intel processors

Performance portable parallel programming of heterogeneous stencils across shared-memory platforms with modern Intel processors

Porting and optimization of solidification application for CPU–MIC hybrid platforms

Data‐aware tuning of scientific applications with model‐based autotuning

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