Accelerating the Execution of Matrix Languages on the Cell Broadband Engine Architecture

Khoury, Raymes; Burgstaller, Bernd; Scholz, Bernhard

doi:10.1109/tpds.2010.58

Cited by 10 publications

(8 citation statements)

References 42 publications

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“…This is similar to the concept of data parallel arrays in Accelerator [25]. Similarly, Khoury et al extend Octave to target the Cell BE processor [19]. However, their system still requires users to cast matrices to a specific type so that operations on these matrices can be performed on the SPEs.…”

Section: Related Workmentioning

confidence: 99%

Automatic compilation of MATLAB programs for synergistic execution on heterogeneous processors

2011

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MATLAB is an array language, initially popular for rapid prototyping, but is now being increasingly used to develop production code for numerical and scientific applications. Typical MAT-LAB programs have abundant data parallelism. These programs also have control flow dominated scalar regions that have an impact on the program's execution time. Today's computer systems have tremendous computing power in the form of traditional CPU cores and throughput oriented accelerators such as graphics processing units(GPUs). Thus, an approach that maps the control flow dominated regions to the CPU and the data parallel regions to the GPU can significantly improve program performance.In this paper, we present the design and implementation of MEGHA, a compiler that automatically compiles MATLAB programs to enable synergistic execution on heterogeneous processors. Our solution is fully automated and does not require programmer input for identifying data parallel regions. We propose a set of compiler optimizations tailored for MATLAB. Our compiler identifies data parallel regions of the program and composes them into kernels. The problem of combining statements into kernels is formulated as a constrained graph clustering problem. Heuristics are presented to map identified kernels to either the CPU or GPU so that kernel execution on the CPU and the GPU happens synergistically and the amount of data transfer needed is minimized. In order to ensure required data movement for dependencies across basic blocks, we propose a data flow analysis and edge splitting strategy. Thus our compiler automatically handles composition of kernels, mapping of kernels to CPU and GPU, scheduling and insertion of required data transfer. The proposed compiler was implemented and experimental evaluation using a set of MATLAB benchmarks shows that our approach achieves a geometric mean speedup of 19.8X for data parallel benchmarks over native execution of MAT-LAB.

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Section: Related Workmentioning

confidence: 99%

Automatic compilation of MATLAB programs for synergistic execution on heterogeneous processors

2011

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“…Khoury et al [8] present the performances of the matrix languages implemented on the Cell BE Architecture. In this case, the authors compare the implementation on the PowerXCell 8i processor that uses all eight SPE cores with the execution on a system with Intel Core2Quad Q9550, achieving a speed-up of 12.…”

Section: Related Workmentioning

confidence: 99%

Intensive computing on a large data volume with a short‐vector single instruction multiple data processor

Ungurean

Găitan

Gaitan

2014

IET Computers & Digital Techniques

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In this study, the authors want to evaluate the performances of the PowerXCell 8i processor, which is based on Cell Broadband Engine architecture. For this purpose, the authors chose an algorithm for the k-nearest neighbour problem. The authors optimised this algorithm for efficient exploitation of the facilities provided by this architecture. The authors evaluated the PowerXCell 8i performances by algorithm execution with single-and double-precision calculations. For both cases, the performances were evaluated with and without SIMDisation. For single-precision calculations, the authors achieved a maximum speed-up of 43.85 with SIMDisation by activating 6 synergetic processor element (SPE) processors and 39.73 without SIMDisation by activating 16 SPE processors. For double-precision calculations, the authors achieved a maximum speed-up of 34.79 with SIMDisation by activating 9 SPE processors and 32.71 without SIMDisation by activating 12 SPE processors. These values related to the execution on the PowerPC processor element processor and are due to the accessing way of the main memory by the SPE cores, through the DMA transfers who are performed in parallel with the computing operations. The authors conclude that this process can be efficiently used for the execution of algorithms that require intensive computations on huge data volume.

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“…improves calculation time and error when estimating the value of . [13] presents a new framework that extends one of the commonly used matrix languages, Octave, to execute matrix operations in parallel in Cell/B.E., which achieves faster results than standard Octave on Intel Core2 Quad processors. In [14], it is developed two image processing algorithms with different computational load on Cell/B.E.…”

Section: Related Workmentioning

confidence: 99%

A Server Model for Reliable Communication on Cell/B.E.

Zhou

Chen

Liu

et al. 2013

2013 42nd International Conference on Parallel Processing

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In most cases of safety-related systems, the network is an indispensable part. At this point, the system reliability is as important as the system communication quality. With the emergence of multi-core architectures, the first generation usually aims to provide reliable and deterministic computing resources. Therefore, with the boost requirement of reliability and throughput that cannot be satisfied by general single-core processors, the deployment of safety-related systems is transferred and processed multi-core environments. In this paper, we propose Reliable Communication Server on SPU (RCSoS), which is a server model for reliable communication utilizing SPU (Synergistic Processor Unit) in Cell/B.E (Cell Broadband Engine). It simulates SPU as a communication server and guarantees the reliability and determinacy by the isolation mode of SPU and contract model. We have implemented RCSoS in PlayStation 3, which dynamically adjust parameters, and inform applications on contract violations. Experiments show the performance of this model.

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Accelerating the Execution of Matrix Languages on the Cell Broadband Engine Architecture

Cited by 10 publications

References 42 publications

Automatic compilation of MATLAB programs for synergistic execution on heterogeneous processors

Automatic compilation of MATLAB programs for synergistic execution on heterogeneous processors

Intensive computing on a large data volume with a short‐vector single instruction multiple data processor

A Server Model for Reliable Communication on Cell/B.E.

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