Optimization of a Solution-Processed SiO₂ Gate Insulator by Plasma Treatment for Zinc Oxide Thin Film Transistors

Abstract

Further information on publisher's website:http://dx.doi.org/10.1021/acsami.5b10520 Publisher's copyright statement: This document is the Accepted Manuscript version of a Published Work that appeared in nal form in ACS Applied Materials and Interfaces, copyright c American Chemical Society after peer review and technical editing by the publisher. To access the nal edited and published work see http://dx.doi.org/10.1021/acsami.5b10520. Additional information:Use policyThe full-text may be used and/or reproduced, and given to third parties in any format or medium, without prior permission or charge, for personal research or study, educational, or not-for-pro t purposes provided that:• a full bibliographic reference is made to the original source • a link is made to the metadata record in DRO • the full-text is not changed in any way The full-text must not be sold in any format or medium without the formal permission of the copyright holders.Please consult the full DRO policy for further details.

Structural and Electrical Characterization of SiO2 Gate Dielectrics Deposited from Solutions at Moderate Temperatures in Air

“…bulk limited) of conduction has also been reported for SiO2 that was deposited from solutions and treated with plasma. 41 Further measurements on the temperature dependence of the plots would help to clarify the situation, however such detailed investigation is outside the scope of the present study.…”

“…14,15 Atomic layer deposition (ALD), an alternative to CVD, has also gained considerable traction for the successful deposition of high quality SiO2 films over a wide range of temperatures and substrates [16][17][18] and more recently, successful deposition of SiO2 films from soluble precursors and further plasma treatment has also been reported. 19,20 However, vacuum-based deposition techniques suffer from potential incompatibility with large area deposition and high manufacturing cost. Thus significant research has been focused on the development of alternative deposition methods from solutions.…”

Intense-pulsed-UV-converted perhydropolysilazane gate dielectrics for organic field-effect transistors and logic gates

“…36,39,40 In addition, a new absorption peak at 3670 cm À1 corresponding to the Si-OH bond-appeared at 3.0 kV, which was related to the undesirable dangling bonds formed during the conversion process. 41 It could be concluded that the SiO 2 network was formed by the hydrolysis of the Si-NH bonds and the subsequent formation of the Si-O bond. Subsequently, the number of intense pulses was increased to 8000 counts while maintaining the applied voltage at 3.0 kV.…”

Materials, Processes, and Facile Manufacturing for Bioresorbable Electronics: A Review

“…SiO 2 can be processed from colloidal dispersion of NPs [257,258] or perhydropolysilazane (PHPS) precursor. [259,260] In the first method, SiO 2 NPs are self-assembled onto poly-(dimethyldiallylammonium chloride) (PDDA)/polystyrene (PSS) treated substrates. Exempting heat-related post-processes, SiO 2 dielectric layers can be formed with effective thickness of 180 nm (Figure 14d).…”

“…The as-fabricated SiO 2 is used as the gate dielectrics of ZnO TFTs. [259,260] FET with the screen printed Si NPs. Reproduced with permission.…”