Optimal parameters for ΔΣ modulator topologies

Marques, A.; Peluso, V.; Steyaert, Michiel; Sansen, Willy

doi:10.1109/82.718590

Cited by 141 publications

(83 citation statements)

References 13 publications

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“…6. The traditional 3rd order topology [2], [14] is also plotted for comparison. It is obvious that the noise floor in synthesized topology of experiment 1 can be reduced further leading to about 12dB improvement of the SNR comparing with the typical structure.…”

Section: Synthesis Experimentsmentioning

confidence: 99%

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Genetic-based high-level synthesis of modulator in SystemC-A

Zhao¹,

Kázmierski²

2010

2010 Forum on Specification &Amp; Design Languages (FDL 2010)

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Abstract-This paper proposes a novel genetic-based high-level synthesis methodology for ΣΔ modulators. This approach is based on simulation-based optimisation where optimal topology of the ΣΔ modulator is automated explored using a genetic algorithm(GA) under various design constraints, such as SNR(Signalto-Noise Ratio) and hardware complexity. The proposed synthesis technique has been implemented in SystemC-A due to its advantages in terms of high simulation speed, flexibility and data manipulation. Experimental results validates the effectiveness of the synthesis approach.

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Section: Synthesis Experimentsmentioning

confidence: 99%

“…In this section, automated synthesis of a third order singleloop ΣΔ modulator is used as a case study to demonstrate the [2], [14].…”

Section: Synthesis Experimentsmentioning

confidence: 99%

Genetic-based high-level synthesis of modulator in SystemC-A

Zhao¹,

Kázmierski²

2010

2010 Forum on Specification &Amp; Design Languages (FDL 2010)

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“…10 can be expressed as a function of the amplifier's input stage transconductance , which is designed considering the settling requirements for specific linearity performance [2], [14]. The capacitive load driven by is derived from the noise performance of each integrator.…”

Section: Power Estimationmentioning

confidence: 99%

“…Each architecture is designed and its performance analyzed from time-domain simulations. Accepted solutions are then subjected to power consumption estimation, assuming switched-capacitor (SC) differential circuits for discrete-time (DT) designs [2], [14] and active-RC differential circuits for continuous-time (CT) designs, respectively. A reduced set of solutions are selected based on the peak SNDR versus power consumption ratio.…”

Section: Introductionmentioning

confidence: 99%

Systematic Design Exploration of Delta-Sigma ADCs

Bajdechi

Gielen

Huijsing

2004

IEEE Trans. Circuits Syst. I

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Abstract-An algorithm for architecture-level exploration of the 16 A/D converter (ADC) design space is presented. Starting from the desired specification, the algorithm finds an optimal solution by exhaustively exploring both single-loop and cascaded architectures, with a single-bit or multibit quantizer, for a range of oversampling ratios. A fast filter-level step evaluates the performance of all loop-filter topologies and passes the accepted solutions to the architecture-level optimization step which maps the filters on feasible architectures and evaluates their performance. The power consumption of each accepted architecture is estimated and the best top-ten solutions in terms of the ratio of peak signal-to-noise+distortion ratio versus power consumption are further optimized for yield. Experimental results for two different design targets are presented. They show that previously published solutions are among the best architectures for a given target but that better solutions can be designed as well.Index Terms-Analog-to-digital converter (ADC), analog-to-digital, computer-aided design (CAD), delta-sigma, design automation.

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“…Although the approximation is improved as the length of window increases, the computation complexity increases. Other existing optimal designs, such as reported in [13]- [15], are obtained mainly based on the simulation framework and lack of the theoretical support. The objective of this paper is to formulate an SDM design problem as optimization problems based on the noise shaping characteristics of SDMs, the stopband characteristics of loop filters and the stability conditions of the noise output and input output transfer functions.…”

Section: Introductionmentioning

confidence: 99%

Design of interpolative sigma delta modulators via a semi-infinite programming approach

Ling

Reiss³

2005

5th IEE International Conference on ADDA 2005. Advanced a/D and D/a Conversion Techniques and Their Applications

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This paper considers the design of interpolative sigma delta modulators (SDMs). The design problem is formulated as two different optimization problems. The first optimization problem is to determine the denominator coefficients. The objective of the optimization problem is to minimize the energy of the error function in the passband of the loop filter in which the error function reflects the noise output transfer function and the ripple of the input output transfer function. The constraint of the optimization problem refers to the specification of the error function defined in the frequency domain. The second optimization problem is to determine the numerator coefficients in which the cost function is to minimize the stopband ripple energy of the loop filter subject to the stability condition of the noise output and input output transfer functions. These two optimization problems are actually quadratic semi-infinite programming (SIP) problems. By employing our recently proposed dual parameterization method for solving the problems, global optimal solutions that satisfy the corresponding continuous constraint are guaranteed if the solutions exist. The advantages of this formulation are the guarantee of the stability of the noise output and input output transfer functions, applicability to design rational IIR filters without imposing specific filter structures such as Laguerre filter and Butterworth filter structures, and the avoidance of the iterative design of numerator and the denominator coefficients because the convergence of the iterative design is not guaranteed. Our simulation results show that this proposed design yields a significant improvement in the signal-to-noise ratio (SNR) compared to the existing designs.

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Optimal parameters for ΔΣ modulator topologies

Cited by 141 publications

References 13 publications

Genetic-based high-level synthesis of modulator in SystemC-A

Genetic-based high-level synthesis of modulator in SystemC-A

Systematic Design Exploration of Delta-Sigma ADCs

Design of interpolative sigma delta modulators via a semi-infinite programming approach

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