Optimal MST-based graph algorithm on FPGA segmentation design

Zhou, Catherine L.; Wu, Yu-Liang

doi:10.1109/icccas.2004.1346409

Cited by 2 publications

(1 citation statement)

References 9 publications

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“…These segments were then packed into channels in a tree-like fashion. Later work [243] extended this effort by using a maximum spanning tree algorithm to perform the graph matching. The need for a mix of segment lengths in island-style FPGA devices is motivated by the characteristics of benchmark designs targeted to the devices.…”

Section: Detailed Island-style Routing Architecturementioning

confidence: 99%

FPGA Architecture: Survey and Challenges

Kuon

Tessier

Rose

2008

FNT in Electronic Design Automation

318

109

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Section: Detailed Island-style Routing Architecturementioning

confidence: 99%

FPGA Architecture: Survey and Challenges

Kuon

Tessier

Rose

2008

FNT in Electronic Design Automation

318

109

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FPGA Architecture: Survey and Challenges

Kuon¹,

Tessier²,

Rose³

2007

167

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Field-Programmable Gate Arrays (FPGAs) have become one of the key digital circuit implementation media over the last decade. A crucial part of their creation lies in their architecture, which governs the nature of their programmable logic functionality and their programmable interconnect. FPGA architecture has a dramatic effect on the quality of the final device's speed performance, area efficiency, and power consumption. This survey reviews the historical development of programmable logic devices, the fundamental programming technologies that the programmability is built on, and then describes the basic understandings gleaned from research on architectures. We include a survey of the key elements of modern commercial FPGA architecture, and look toward future trends in the field. Programming Technologies Every FPGA relies on an underlying programming technology that is used to control the programmable switches that give FPGAs their programmability. There are a number of programming technologies and their differences have a significant effect on programmable logic architecture. The approaches that have been used historically include EPROM [81], EEPROM [68, 174], flash [92], static memory [49], and anti-fuses [38, 93]. Of these approaches, only the flash, static memory and anti-fuse approaches are widely used in modern FPGAs. This survey focuses primarily on static memory-based FPGAs but, in this section, all these modern programming technologies will be reviewed to provide a more complete understanding of the advantages and disadvantages of static memory-based programming.

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Optimal MST-based graph algorithm on FPGA segmentation design

Cited by 2 publications

References 9 publications

FPGA Architecture: Survey and Challenges

FPGA Architecture: Survey and Challenges

FPGA Architecture: Survey and Challenges

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