2016 17th Latin-American Test Symposium (LATS) 2016
DOI: 10.1109/latw.2016.7483353
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On-silicon validation of a benchmark generation methodology for effectively evaluating combinational cell library design

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Cited by 2 publications
(2 citation statements)
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“…An ASIC was designed to correlate the simulation results with silicon results [1], [4]. The ASIC consists of the standard cells along with peripheral circuit required to measure delay and power of an individual standard cell.…”
Section: Asic Design For Standard Cell Verificationmentioning
confidence: 99%
See 1 more Smart Citation
“…An ASIC was designed to correlate the simulation results with silicon results [1], [4]. The ASIC consists of the standard cells along with peripheral circuit required to measure delay and power of an individual standard cell.…”
Section: Asic Design For Standard Cell Verificationmentioning
confidence: 99%
“…The availability of a large number of library cells provides larger ASIC design space which improves overall circuit design and area. The standard cell libraries can be enriched by adding new drive strengths [1], through the addition of new functions [2] or even with special transistor topologies [3].…”
Section: Introductionmentioning
confidence: 99%